DATASHEET NOT RECOMMENDED FOR NEW DESIGNS POSSIBLE SUBSTITUTE PRODUCT ISL22316 ISL22416 FN6227 Rev 2.00 Single Digitally Controlled Potentiometer (XDCP) Low Noise, Low Power, SPI September 9, 2009 Bus, 128 Taps The ISL22416 integrates a single digitally controlled Features potentiometer (DCP) and non-volatile memory on a 128 resistor taps monolithic CMOS integrated circuit. SPI serial interface The digitally controlled potentiometer is implemented with a combination of resistor elements and CMOS switches. The Non-volatile storage of wiper position position of the wiper is controlled by the user through the SPI Wiper resistance: 70 typical V = 3.3V CC serial interface. The potentiometer has an associated Shutdown mode volatile Wiper Register (WR) and a non-volatile Initial Value Register (IVR) that can be directly written to and read by the Shutdown current 5A max user. The contents of the WR controls the position of the Power supply: 2.7V to 5.5V wiper. At power-up, the device recalls the contents of the DCPs IVR to the WR. 50kor 10k total resistance The DCP can be used as a three-terminal potentiometer or High reliability as a two-terminal variable resistor in a wide variety of - Endurance: 1,000,000 data changes per bit per register applications including control, parameter adjustments, and - Register data retention: 50 years T +55C signal processing. 10 Ld MSOP and 10 Ld TDFN package Pb-free (RoHS compliant) Pinout ISL22416 ISL22416 (10 LD MSOP) (10 LD TDFN) TOP VIEW TOP VIEW O 10 SCK 1 VCC SCK 1 10 VCC SDO SDO 2 9 RH 2 RH 9 RW 3 8 SDI 3 SDI RW 8 7 CS 7 CS RL 4 RL 4 SHDN SHDN 5 6 5 6 GND GND Ordering Information PART NUMBER RESISTANCE OPTION TEMP. RANGE PACKAGE (Note) PART MARKING (k ) (C) (Pb-free) PKG. DWG. ISL22416UFU10Z* 416UZ 50 -40 to +125 10 Ld MSOP M10.118 ISL22416UFRT10Z* 416U 50 -40 to +125 10 Ld 3x3 TDFN L10.3x3B ISL22416WFU10Z* 416WZ 10 -40 to +125 10 Ld MSOP M10.118 ISL22416WFRT10Z* 416W 10 -40 to +125 10 Ld 3x3 TDFN L10.3x3B *Add -TK suffix for tape and reel. Please refer to TB347 for details on reel specifications. NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. FN6227 Rev 2.00 Page 1 of 14 September 9, 2009ISL22416 Block Diagram V CC SCK POWER-UP INTERFACE, RH SDO CONTROL SPI SDI AND INTERFACE STATUS CS LOGIC RW WR RL IVR NON-VOLATILE SHDN REGISTER GND Pin Descriptions MSOP/TDFN PIN NUMBER SYMBOL DESCRIPTION 1 SCK SPI interface clock input 2 SDO Push-pull/Open Drain Data Output of the SPI serial interface 3 SDI Data Input of the SPI serial interface 4CS Chip Select active low input 5 SHDN Shutdown active low input 6 GND Device ground pin 7 RL Low terminal of DCP 8 RW Wiper terminal of DCP 9 RH High terminal of DCP 10 V Power supply pin CC FN6227 Rev 2.00 Page 2 of 14 September 9, 2009