USERS MANUAL ISL85005EVAL1Z, ISL85005AEVAL1Z UG100 Rev.0.00 Evaluation Boards User Guide Jan 11, 2017 Description Key Features The ISL85005 and ISL85005A are 4.5V to 18V input, 5A Switch selectable EN (enabled/disabled) synchronous buck regulators for applications with input Jumper selectable MODE (DEM/Forced CCM) voltage from multicell batteries or regulated 5V and 12V power (ISL85005EVAL1Z) rails. These devices also provide an integrated bootstrap diode Internal and external compensation options for the high-side gate driver to reduce the external parts count. The ISL85005EVAL1Z and ISL85005AEVAL1Z platforms allow Frequency synchronization option (ISL85005EVAL1Z) quick evaluation of the high-performance features of the Adjustable soft-start option (ISL85005AEVAL1Z) ISL85005 and ISL85005A buck regulators. Connectors and test points for easy probing Specifications Related Literature These boards have been configured and optimized for the For a full list of related documents, visit our website following operating conditions: - ISL85005 and ISL85005A product pages Input voltage ranges from 7V to 15V 5V nominal output voltage Ordering Information Up to 5A output current capability PART NUMBER DESCRIPTION Default internally set to 500kHz switching frequency ISL85005EVAL1Z Evaluation Board for ISL85005FRZ Default internally set to 2.3ms soft-start ISL85005AEVAL1Z Evaluation Board for ISL85005AFRZ Operating temperature range: -40C to +85C GND = DEM ISL85005 ISL85005A C VCC = FCCM SS SYNC/ MODE 1 BOOT 12 1 BOOT 12 SS C MODE 4 C 4 VDD 2 11 PG 2 PG 11 PG PG VDD V V IN IN VIN EN EN 3 10 3 EN 10 EN VIN PGND PGND VIN C 4 FB VIN 9 C 4 FB 9 3 3 C C C C 5 6 5 6 R R 1 1 R 2 PHASE 5 8 5 COMP PHASE 8 COMP R 2 V V OUT OUT C C 1 1 PHASE 6 AGND 7 6 AGND PHASE 7 L L 1 1 C C C C 8 8 9 9 FIGURE 1A. ISL85005EVAL1Z FIGURE 1B. ISL85005AEVAL1Z FIGURE 1. BLOCK DIAGRAM UG100 Rev.0.00 Page 1 of 8 Jan 11, 2017ISL85005EVAL1Z, ISL85005AEVAL1Z Connector and Test Point Quick Setup Guide Descriptions Refer to the following Quick Setup Guide to configure and power-up the board for proper operation. The ISL85005EVAL1Z and ISL85005AEVAL1Z evaluation boards include I/O connectors and test points as shown in Table 1. 1. Set the power supply voltage to 12V and turn off the power supply. Connect the positive output of power supply to J3 (VIN) TABLE 1. CONNECTORS AND TEST POINTS and the negative output to J4 (GND). REF DES DESCRIPTION 2. Connect an electronic load to J5 (VOUT) for the positive connection and J6 (GND) for the negative connection. J1 2-position socket connector for PHASE to GND test 3. Measure the output voltage (test points P8 and P9) with the J2 2-position socket connector for VOUT to GND test voltmeter. J3 Input voltage positive connection 4. Place scope probes on VOUT test point (J2) and other test J4 Input voltage return connection points of interest. 5. Toggle selection switch SW1 to ON position. J5 Output voltage positive connection 6. Set the load current to be 0.1A and turn on the power supply. J6 Output voltage return connection The output voltage should be in regulation with a nominal 5V P1 (PGOOD) Power-good output output. P2(SS) Soft-start test point (ISL85005AEVAL1Z) 7. Slowly increase the load up to 5A while monitoring the output voltage, which should remain in regulation with a nominal 5V P2 (SYNC/MODE) External synchronization clock connection output. (ISL85005EVAL1Z) 8. Slowly sweep VIN from 7V to 15V. The output voltage should P4 (VIN) Input voltage positive test point remain in regulation with a nominal 5V output. P5 (GND) Input voltage return test point 9. Decrease the input voltage to 0V to shut down the regulator. P6 (EN) Enable test point Frequency Synchronization P7 (VDD) Internal LDO output test point (ISL85005EVAL1Z) P8 (VOUT) Output voltage positive test point The ISL85005 can be synchronized to an external clock with P9 (GND) Output voltage return test point frequency ranges from 300kHz to 2MHz by applying the external clock to test point P2 on the ISL85005EVAL1Z evaluation board. Selection Switch and Jumper The external clock should meet the specifications of pulse width and voltage level described in the ISL85005 datasheet. Descriptions Switch SW1 (Enable) Adjusting Soft-Start Time The switch enables and disables ISL85005/ISL85005A: (ISL85005AEVAL1Z) ), - Switch in position ON (EN tied to VIN through R 7 ISL85005 and ISL85005A enabled With SS pin floating, the ISL85005A features an internally set 2.3ms of soft-start time. The soft-start time can be set to a - Switch in position OFF (EN tied to GND), ISL85005 and ISL85005A disabled desired value by connecting an external capacitor (C on the SS ISL85005AEVAL1Z evaluation board) between the SS pin and Jumper J7 (MODE) (ISL85005EVAL1Z) AGND. The capacitance can be calculated by Equation 1: The jumper provides selection of different operation modes (EQ. 1) detailed as following: C nF = 3.5 t ms 1.6nF SS SS - Switch in position FCCM (SYNC/MODE tied to VDD through R ), the ISL85005 operates in forced CCM. 6 Evaluating Other Output - Switch in position DEM (SYNC/MODE tied to GND), the Voltages ISL85005 operates in Diode Emulation mode and enables automatic transition from CCM to DCM at light-load Both ISL85005EVAL1Z and ISL85005AEVAL1Z have a nominal conditions. 5V output voltage. The output voltages are programmable by an external resistor divider formed by R and R as shown in 1 2 Figure 1. R is usually chosen first, then the value for R can be 1 2 calculated based on R and the desired output voltage using 1 Equation 2. R 0.8V 1 (EQ. 2) R = ---------------------------------- 2 V 0.8V OUT UG100 Rev.0.00 Page 2 of 8 Jan 11, 2017