ISL97701IRZ-T7 Renesas

DATASHEET ISL97701 FN6474 Rev 1.00 Boost Regulator with Integrated Schottky and Input Disconnect Switch February 22, 2008 The ISL97701 represents a high efficiency boost converter Features with integrated boost FET, boost diode and input disconnect Up to 87% efficiency FET. 2.3V to 5.5V input With an input voltage of 2.3V to 5.5V the ISL97701 has an output capability of up to 50mA at 18V using integrated Up to 28V output 500mA switches. Efficiencies are up to 87%. The 50mA at 18V integrated protection FET is used to disconnect the boost Integrated boost Schottky diode inductor from the input supply whenever an output fault condition is detected, or when the device is disabled. This Input voltage disconnect switch gives 0 output current in the disabled mode, compared to Synchronization input standard boost converters where current can still flow when the device is disabled. Chip enable The ISL97701 comes in the 10 Ld 3x3 DFN package and is 10 Ld 3x3 DFN package specified for operation over the -40C to +85C temperature Pb-free (RoHS compliant) range. Applications Ordering Information OLED display power PART NUMBER PART PACKAGE PKG. LED display power (Note) MARKING (Pb-free) DWG. Adjustable power supplies ISL97701IRZ 977 01IRZ 10 Ld 3x3 DFN MDP0047 Typical Application Diagram ISL97701IRZ-T7* 977 01IRZ 10 Ld 3x3 DFN MDP0047 ISL97701IRZ-T13* 977 01IRZ 10 Ld 3x3 DFN MDP0047 L 1 *Please refer to TB347 for details on reel specifications. 6.8H NOTE: These Intersil Pb-free plastic packaged products employ VDDOUT special Pb-free material sets molding compounds/die attach materials and 100% matte tin plate PLUS ANNEAL - e3 termination LX 2.3V TO 5.5V VDD finish, which is RoHS compliant and compatible with both SnPb and V +2V TO 30V DD VOUT Pb-free soldering operations. Intersil Pb-free products are MSL C 0 classified at Pb-free peak reflow temperatures that meet or exceed C 5F R 1 1 the Pb-free requirements of IPC/JEDEC J STD-020. 3.3F 390k NEN NSYNC Pinout GND FB ISL97701 (10 LD 3X3 DFN) R 2 TOP VIEW 39k GND LX 1 10 NOTE: VOUT = (390k + 39k)/39k*1.15V = 12.65V VOUT VDDOUT 2 9 THERMAL VDD NEN 3 8 PAD NSYNC GND 4 7 FB NC 5 6 FN6474 Rev 1.00 Page 1 of 11 February 22, 2008 OSCILLATOR AND CONTROLISL97701 Block Diagram VDD SYNCHRONIZATION UNDERVOLTAGE OVER-TEMPERATURE VDD SIGNAL DETECTOR DETECTOR DETECTOR NSYNC 1 OVERCURRENT S2 MUX DETECTOR (DC) OSCILLATOR 0 VDD CLK VDDOUT RESTART DISABLE AND WAIT NEN START STATE MACHINE (DEFAULT SEQUENCE) 1. SOFT INRUSH 2. VDD ENABLE OUT OVER- GND 3. SOFT BOOST 25 VOUT VOLTAGE 2 4. SOFT BOOST 50 DETECTOR 5. SOFT BOOST 75 6. NORMAL LX SLOPE + EN COMPENSATION As CONTROL LOGIC GATE RAMP-GENERATOR - DRIVER -PWM TIMING - + -CURRENT LIMIT Av ERROR - -PULSE SKIPPING AMP CURRENT + + CLAMP C LIMIT COMP Ai FB - COMPARATOR VOLTAGE REFERENCE RSENSE GND ISL97701 FIGURE 1. ISL97701 BLOCK DIAGRAM FN6474 Rev 1.00 Page 2 of 11 February 22, 2008