DATASHEET FN8583 TW2984 Rev.0.00 September 24, 2013 4-CH WD1 (960H)/D1 Compatible Video Decoders and Audio Codecs Features Video Decoder Audio Codec WD1 (960H) and D1 compatible video decoding Integrated five audio ADCs processing and one operation and it is programmable each channel audio DAC NTSC (M, 4.43) and PAL (B, D, G, H, I, M, N, N Provides multi-channel audio mixed analog output combination), PAL (60) support with automatic Support I2S/DSP Master/Slave interface for record format detection output and playback input Built-in analog anti-alias filter PCM 8/16-bit and u-Law/A-Law 8-bit for audio word length Four 10-bit ADCs and analog clamping circuit for CVBS input Programmable audio sample rate that covers popular frequencies of 8/16/32/44.1/48kHz Fully programmable static gain or automatic gain control for the Y channel Miscellaneous Programmable white peak control for CVBS channel Two-wire MPU serial bus interface 4-H adaptive comb filter Y/C separation Integrated clock PLL for 144/108MHz clock output PAL delay line for color phase error correction Power save and Power down mode Image enhancement with peaking and CTI Low power consumption Digital sub-carrier PLL for accurate color decoding Single 27MHz crystal for all standards and both Digital Horizontal PLL for synchronization WD1 and D1 format processing and pixel sampling 3.3V tolerant I/O Advanced synchronization processing and sync 1.0V/3.3V power supply detection for handling non-standard and weak 8mm x 8mm 68-pin QFN package signal Programmable hue, brightness, saturation, contrast, sharpness Automatic color control and color killer ITU-R 656 like YCbCr (4:2:2) output or time multiplexed output with 36/72/144MHz for WD1 or 27/54/108MHz for D1 format FN8583 Rev.0.00 Page 1 of 123 September 24, 2013 TW2984 44HH CCoommbb VIN1 ADC ADC VViiddeeoo DDeeccooddeerr VD 7:0 AIN1 AADDCC DDeecciimmaattiioonn FFiilltteerr 44HH CCoommbb VIN2 AADDCC VViiddeeoo DDeeccooddeerr AIN2 ADC ADC DDeecciimmaattiioonn FFiilltteerr CLKPO XTO XTI 44HH CCoommbb VIN3 ADC ADC VViiddeeoo DDeeccooddeerr CLKNO SCLK AIN3 AADDCC DDeecciimmaattiioonn FFiilltteerr SDAT IRQ 44HH CCoommbb VIN4 AADDCC ACLKR VViiddeeoo DDeeccooddeerr ASYNR ADATR AIN4 AADDCC Decimation Filter ADATM ACLKP ASYNP AIN5 Decimation Filter ADC ADATP DAC Interpolation Filter AOUT FIGURE 1. TW2984 BLOCK DIAGRAM FN8583 Rev.0.00 Page 2 of 123 September 24, 2013 Clock PLL I2S Host BT.656 Clock Interface Interface Interface Generator