DATASHEET X9314 FN8178 Rev 3.00 Terminal Voltages 5V, 32 Taps, Log Taper Single Digitally Controlled July 24, 2014 Potentiometer (XDCP) The Intersil X9314 is a solid state nonvolatile potentiometer and Features is ideal for digitally controlled resistance trimming. Solid State Potentiometer The X9314 is a resistor array composed of 31 resistive 32 Taps elements. Between each element and at either end are tap points accessible to the wiper element. The position of the 10kEnd to End Resistance wiper element is controlled by the CS, U/D, and INC inputs. Three-Wire Up/Down Serial Interface The position of the wiper can be stored in nonvolatile Wiper Resistance, 40Typical memory and then be recalled upon a subsequent power-up operation. Nonvolatile Storage and Recall on Power-up of Wiper Position Standby Current < 500A Max (Total Package) The XDCP can be used as a three-terminal potentiometer or as a two-terminal variable resistor in a wide variety of V = 3V to 5.5V Operation CC applications including control, parameter adjustments, and 100 Year Data Retention signal processing. Offered in 8 Ld MSOP and SOIC Packages Pb-Free Plus Anneal Available (RoHS Compliant) Block Diagram U/D 5-Bit 31 V /R H H INC UP/DOWN COUNTER CS 30 29 28 5-Bit NONVOLATILE ONE MEMORY OF THIRTY-TWO TRANSFER RESISTOR DECODER GATES ARRAY 2 STORE AND RECALL 1 CONTROL CIRCUITRY 0 V CC V /R L L V SS V /R W W FN8178 Rev 3.00 Page 1 of 8 July 24, 2014X9314 Ordering Information PART NUMBER PART V RANGE R TEMP RANGE PACKAGE PKG. CC TOTAL (Notes 1, 2) MARKING (V) (k ) (C) (Pb-Free) DWG. X9314WSIZ X9314W ZI 5 10% 10 -40 to +85 8 Ld SOIC M8.15 X9314WSZ X9314W Z 0 to +70 8 Ld SOIC M8.15 X9314WMIZ-3 DEX 3 to 5.5 -40 to +85 8 Ld MSOP M8.118 X9314WSZ-3 X9314W ZD 0 to +70 8 Ld SOIC M8.15 NOTES: 1. AddT1 suffix for tape and reel. 2. Intersil Pb-free plus anneal products employ special Pb-free material sets molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. Pin Descriptions Pin Configuration X9314 V /R and V /R H H L L 8 LD SOIC The high (V /R ) and low (V /R ) terminals of the X9314 are H H L L TOP VIEW equivalent to the fixed terminals of a mechanical potentiometer. The minimum voltage is -5V and the maximum V INC 1 8 CC is +5V. It should be noted that the terminology of V /R and L L U/D 2 7 CS V /R references the relative position of the terminal in H H X9314 V /R V /R H H 3 6 L L relation to wiper movement direction selected by the U/D input V V /R 4 5 SS W W and not the voltage potential on the terminal. V /R W W V /R is the wiper terminal, equivalent to the movable W W terminal of a mechanical potentiometer. The position of the X9314 wiper within the array is determined by the control inputs. The 8 LD MSOP wiper terminal series resistance is typically 40 . TOP VIEW Up/ Down (U/D) V /R U/D H H 1 8 The U/D input controls the direction of the wiper movement V 2 7 INC SS and whether the counter is incremented or decremented. X9314 V CC V /R 3 6 W W Increment (INC) V /R 4 5 CS L L The INC input is negative-edge triggered. Toggling INC will move the wiper and either increment or decrement the counter in the direction indicated by the logic level on the U/D input. Chip Select (CS) Pin Names The device is selected when the CS input is LOW. The current SYMBOL DESCRIPTION counter value is stored in nonvolatile memory when CS is returned HIGH while the INC input is also HIGH. After the store V /R High Terminal H H operation is complete the X9314 will be placed in the low V /R Wiper Terminal W W power standby mode until the device is selected once again. V /R Low Terminal L L V Ground SS V Supply Voltage CC U/D Up/Down Input INC Increment Input CS Chip Select Input FN8178 Rev 3.00 Page 2 of 8 July 24, 2014