DATASHEET X9C102, X9C103, X9C104, X9C503 FN8222 Rev 4.00 Digitally Controlled Potentiometer (XDCP) Jan 11, 2019 The X9C102, X9C103, X9C104, X9C503 are digitally Features controlled (XDCP) potentiometers. The device consists of a Solid-State Potentiometer resistor array, wiper switches, a control section, and nonvolatile memory. The wiper position is controlled by a Three-Wire Serial Interface three-wire interface. 100 Wiper Tap Points The potentiometer is implemented by a resistor array - Wiper Position Stored in Non-volatile Memory and composed of 99 resistive elements and a wiper switching Recalled on Power-up network. Between each element and at either end are tap 99 Resistive Elements points accessible to the wiper terminal. The position of the - Temperature Compensated wiper element is controlled by the CS, U/D, and INC inputs. - End-to-End Resistance, 20% The position of the wiper can be stored in non-volatile - Terminal Voltages, 5V memory and then be recalled upon a subsequent power-up operation. Low Power CMOS The device can be used as a three-terminal potentiometer or -V = 5V CC as a two-terminal variable resistor in a wide variety of - Active Current, 3mA max. applications ranging from control to signal processing to - Standby Current, 750A max. parameter adjustment. High Reliability Pinout - Endurance, 100,000 Data Changes per Bit X9C102, X9C103, X9C104, X9C503 - Register Data Retention, 100 years (8 LD SOIC, 8 LD PDIP) X9C102 = 1k TOP VIEW X9C103 = 10k INC V 1 8 CC X9C503 = 50k CS U/D 2 7 X9C104 = 100k V /R V /R 3 6 L L H H V V /R Packages SS 4 5 W W - 8 Ld SOIC - 8 Ld PDIP Pb-Free Available (RoHS Compliant) Block Diagram U/D 7-BIT 99 R V H/ H UP/DOWN INC COUNTER CS 98 V (SUPPLY VOLTAGE) CC 97 96 V /R 7-BIT H H UP/DOWN (U/D) NON-VOLATILE ONE CONTROL MEMORY OF INCREMENT (INC) AND R /V W W ONE- MEMORY HUNDRED TRANSFER RESISTOR DEVICE (CS) DECODER GATES ARRAY SELECT V /R L L 2 V (GROUND) SS STORE AND 1 RECALL GENERAL CONTROL V CC CIRCUITRY 0 GND R /V L L R /V DETAILED W W FN8222 Rev 4.00 Page 1 of 12 Jan 11, 2019X9C102, X9C103, X9C104, X9C503 Ordering Information PART PART R TEMP RANGE PACKAGE PACKAGE TOTAL NUMBER MARKING (k ) (C) (RoHS Compliant) DWG. X9C102PZ (Notes 2, 3) X9C102P Z 1 0 to +70 8 Ld PDIP MDP0031 X9C102PIZ (Notes 2, 3) X9C102P ZI -40 to +85 8 Ld PDIP MDP0031 X9C102SZ (Notes 1, 2) X9C102S Z 0 to +70 8 Ld SOIC M8.15E X9C102SIZ (Notes 1, 2) X9C102S ZI -40 to +85 8 Ld SOIC M8.15E X9C103PZ (Notes 2, 3) X9C103P Z 10 0 to +70 8 Ld PDIP MDP0031 X9C103PIZ (Notes 2, 3) X9C103P ZI -40 to +85 8 Ld PDIP MDP0031 X9C103SZ (Notes 1, 2) X9C103S Z 0 to +70 8 Ld SOIC M8.15 X9C103SIZ (Notes 1, 2) X9C103S ZI -40 to +85 8 Ld SOIC M8.15 X9C503PZ (Notes 2, 3) X9C503P Z 50 0 to +70 8 Ld PDIP MDP0031 X9C503PIZ (Notes 2, 3) X9C503P ZI -40 to +85 8 Ld PDIP MDP0031 X9C503SZ (Notes 1, 2) X9C503S Z 0 to +70 8 Ld SOIC M8.15E X9C503SIZ (Notes 1, 2) X9C503S ZI -40 to +85 8 Ld SOIC M8.15E X9C104PIZ (Notes 2, 3) X9C104P ZI 100 -40 to +85 8 Ld PDIP MDP0031 X9C104SZ (Notes 1, 2) X9C104S Z 0 to +70 8 Ld SOIC M8.15E X9C104SIZ (Notes 1, 2) X9C104S ZI -40 to +85 8 Ld SOIC M8.15E NOTES: 1. Add T1 suffix for tape and reel. See TB347 for details about reel specifications. 2. These Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. Pb-free PDIPs can be used for through-hole wave solder processing only. They are not intended for use in Reflow solder processing applications. FN8222 Rev 4.00 Page 2 of 12 Jan 11, 2019