DATASHEET X9C303 FN8223 Rev 2.00 Logarithmic Digitally Controlled Potentiometer (XDCP) Terminal Voltage 5V, January 30, 2009 100 Taps, Log Taper Description Features The Intersil X9C303 is a digitally controlled potentiometer Solid-state potentiometer (XDCP). The device consists of a resistor array, wiper Three-wire serial interface switches, a control section, and nonvolatile memory. The 100 wiper tap points wiper position is controlled by a three-wire interface. - Wiper position stored in nonvolatile memory and The resistor array is composed of 99 resistive elements. recalled on power-up Between each element and at either end are tap points 99 resistive elements, log taper accessible to the wiper terminal. The position of the wiper - Temperature compensated element is controlled by the CS, U/D, and INC inputs. The - End-to-end resistance, 32k 15% position of the wiper can be stored in nonvolatile memory and then be recalled upon a subsequent power-up - Terminal voltages, 5V operation. Low power CMOS The device can be used as a three-terminal potentiometer or -V = 5V CC as a two-terminal variable resistor in a wide variety of - Active current, 3mA max. applications ranging from control, to signal processing, to - Standby current, 750A max. parameter adjustment. Digitally-controlled potentiometers High reliability provide three powerful application advantages (1) the - Endurance, 100,000 data changes per bit variability and reliability of a solid-state potentiometer, (2) the - Register data retention, 100 years flexibility of computer-based digital controls, and (3) the use of nonvolatile memory for potentiometer settings retention. Packages - 8 Ld TSSOP - 8 Ld SOIC - 8 Ld PDIP Pb-free available (RoHS compliant) Block Diagram U/D 7-BIT 99 R V H/ H UP/DOWN INC COUNTER CS 98 97 96 7-BIT NONVOLATILE ONE OF MEMORY ONE- HUNDRED TRANSFER RESISTOR DECODER GATES ARRAY 2 STORE AND 1 RECALL CONTROL V CC CIRCUITRY 0 V SS R V L/ L R V W/ W FN8223 Rev 2.00 Page 1 of 10 January 30, 2009X9C303 Ordering Information PART PART TEMP. RANGE PKG. NUMBER MARKING (C) PACKAGE DWG. X9C303P X9C303P 0 to +70 8 Ld PDIP MDP0031 X9C303PI X9C303P I -40 to +85 8 Ld PDIP MDP0031 X9C303PIZ (Notes 1, 2) X9C303P ZI -40 to +85 8 Ld PDIP (300 mil) (Pb-free) MDP0031 X9C303PZ (Notes 1, 2) X9C303P Z 0 to +70 8 Ld PDIP (300 mil) (Pb-free) MDP0031 , X9C303S8* ** X9C303S 0 to +70 8 Ld SOIC (150 mil) MDP0027 X9C303S8I* X9C303S I -40 to +85 8 Ld SOIC (150 mil) MDP0027 X9C303S8IZ* (Note 1) X9C303S ZI -40 to +85 8 Ld SOIC (150 mil) (Pb-free) MDP0027 X9C303S8Z* (Note 1) X9C303S Z 0 to +70 8 Ld SOIC (150 mil) (Pb-free) MDP0027 , X9C303V8* ** 9C303 0 to +70 8 Ld TSSOP (4.4mm) M8.173 X9C303V8I* C303 I -40 to +85 8 Ld TSSOP (4.4mm) M8.173 X9C303V8IZ* (Note 1) C303 IZ -40 to +85 8 Ld TSSOP (4.4mm) (Pb-free) M8.173 X9C303V8Z* (Note 1) 9C303 Z 0 to +70 8 Ld TSSOP (4.4mm) (Pb-free) M8.173 X9C303S8I-2.7 X9C303S G -40 to +85 8 Ld SOIC (150 mil) MDP0027 X9C303S8IZ-2.7 (Note 1) X9C303S ZG -40 to +85 8 Ld SOIC (150 mil) (Pb-free) MDP0027 *Add T1 suffix for tape and reel. Please refer to TB347 for details on reel specifications. **Add T2 suffix for tape and reel. Please refer to TB347 for details on reel specifications. NOTES: 1. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 2. Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications. returned HIGH while the INC input is also HIGH. After the store Pin Descriptions operation is complete, the device will be placed in the low power V and V H L standby mode until the device is selected once again. The high (V ) and low (V ) terminals of the device are H L Pinouts equivalent to the fixed terminals of a mechanical X9C303 potentiometer. The minimum voltage is 5V and the maximum (8 LD SOIC, 8 LD PDIP) is +5V. It should be noted that the terminology of V and V L H TOP VIEW references the relative position of the terminal in relation to wiper movement direction selected by the U/D input and not INC V the voltage potential on the terminal. 1 8 CC CS U/D 2 7 V W X9C303 V V 3 6 L H V is the wiper terminal, equivalent to the movable terminal of W V V SS 4 5 W a mechanical potentiometer. The position of the wiper within the array is determined by the control inputs. The wiper terminal series resistance is typically 40 . Up/Down (U/D) X9C303 (8 LD TSSOP) The U/D input controls the direction of the wiper movement TOP VIEW and whether the counter is incremented or decremented. Increment (INC) CS V 1 8 L The INC input is negative-edge triggered. Toggling INC will move V 2 7 V CC W X9C303 the wiper and either increment or decrement the counter in the V INC 3 6 SS direction indicated by the logic level on the U/D input. U/D V 4 5 H Chip Select (CS) The device is selected when the CS input is LOW. The current counter value is stored in nonvolatile memory when CS is FN8223 Rev 2.00 Page 2 of 10 January 30, 2009