Datasheet 1.0V to 5.5V, 1A 1ch Termination Regulator for DDR-SDRAMs BD35390FJ Key Specifications General Description Termination Input Voltage Range: 1.0V to 5.5V BD35390FJ is a termination regulator that complies with VCC Input Voltage Range: 2.7V to 5.5V JEDEC requirements for DDR1/2/3-SDRAM. This linear VDDQ Reference Voltage Range: 1.0V to 2.75V power supply uses a built-in N-channel MOSFET and Output Current: 1.0A (Max) high-speed OP-AMPS specially designed to provide Output Current (Pulse): 3.0A (Max) excellent transient response. It has a sink/source High side FET ON-Resistance: 0.35 (Typ) current capability up to 1A and has a power supply bias Low side FET ON-Resistance: 0.35(Typ) requirement of 3.3V to 5.0V for driving the N-channel Standby Current: 0.5mA (Typ) MOSFET. By employing an independent reference Operating Temperature Range: -30C to +100C voltage input (VDDQ) and a feedback pin (VTTS), this termination regulator provides excellent output voltage Package W(Typ) x D(Typ) x H(Max) accuracy and load regulation as required by JEDEC standards. Features Incorporates a Push-Pull Power Supply for Termination (VTT) Incorporates an Enabler Incorporates an Under Voltage Lockout (UVLO) Incorporates a Thermal Shutdown Protector (TSD) Compatible with Dual Channel (DDR1, DDR2, SOP-J8 DDR3) 4.90mm x 6.00mm x 1.65mm Incorporates PGOOD Function Applications Power Supply for DDR 1/2/3 - SDRAM Typical Application Circuit, Block Diagram VCC VDDQ VTT IN C C 3 5 VCC VDDQ VTT IN 6 5 7 V CC V CC UVLO SOFT Reference VTT Block TSD 8 VTT EN TSD V CC UVLO EN C 7 UVLO TSD EN UVLO Thermal TSD 3 Protection R 1 Enable VTTS EN 4 1 EN PGOOD Delay Logic 2 GND Product structureSilicon monolithic integrated circuit This product has no designed protection against radioactive rays .www .rohm.com TSZ02201-0J2J0A900720-1-2 2014 ROHM Co., Ltd. All rights reserved. 1/16 TSZ2211114 001 22.Jul.2015 Rev.002 DatasheetDatasheet BD35390FJ Pin Configuration Pin Descriptions TOP VIEW Pin No. Pin Name Pin Function 1 PGOOD PGOOD output pin 1 VTT PGOOD 8 2 GND GND 3 VTTS Detector pin for termination voltage VTT IN GND 2 7 4 EN ENABLE input pin 5 VDDQ Reference voltage input pin VTTS 3 6 VCC 6 VCC VCC pin 4 5 VDDQ EN 7 VTT IN Termination power supply pin 8 VTT Termination output pin Description of Blocks 1. VCC The VCC pin is for the independent power supply input that operates the internal circuit of the IC. It is the voltage at this pin that drives the ICs amplifier circuits. The VCC input ranges from 2.7V to 5V and maximum current consumption is 4mA. A bypass capacitor of 1 F or so should be connected to this pin when using the IC in an application circuit. 2. VDDQ This is the power supply input pin for an internal voltage divider network. The voltage at VDDQ is halved by two 50k internal voltage-divider resistors and the resulting voltage serves as reference for the VTT output. Since V = 1/2V , TT DDQ the JEDEC requirement for DDR1/2/3-SDRAM can be satisfied by supplying the correct voltage to VDDQ. Noise input should be avoided at the VDDQ pin as it is also included by the voltage-divider at the output. An RC filter consisting of a resistor and a capacitor (220 and 2.2F, for instance,) may be used to reduce the noise input but make sure that it will not significantly affect the voltage-dividers output. 3. VTT IN VTT IN is the power supply input pin for the VTT output. Input voltage may range from 1.0V to 5.5V, but consideration must be given to the current limit dictated by the ON-Resistance of the IC and to the change in allowable loss due to input/output voltage difference. Generally, the following voltages are supplied: DDR1 VTT IN = 2.5V DDR2 VTT IN = 1.8V DDR3 VTT IN = 1.5V Take note that a high-impedance voltage input at VTT IN may result in oscillation or degradation in ripple rejection, so connecting a 10F capacitor with minimal change in capacitance to VTT IN terminal is recommended. However, this impedance may depend on the characteristics of the power supply input and the impedance of the PC board wiring, which must be carefully checked before use. 4. PGOOD PGOOD is the power good output pin. This is an open-drain pin so it should be connected to a power supply via a pull-up resistor. If VTT voltage becomes over 1/2V +30mV, or under 1/2V +30mV, it outputs a High voltage. DDQ DDQ 5. VTTS VTTS is a sense pin for the load regulation of the VTT output voltage. In case the wire connecting VTT pin and the load is too long, connecting VTTS pin to the part of the wire nearer to the load may improve load regulation. VTTS terminal is High impedance terminal. Therefore it is easy to be affected by the noise. The stable operation of the IC is possible by inserting RC filter (e.g.,: R=200, C=1000pF) near VTTS terminal. 6. VTT This is the output pin for the DDR memory termination voltage and it has a sink/source current capability of 1.0A. VTT voltage tracks the voltage at VDDQ pin divided in half. The output is turned OFF when EN pin is Low or when either the VCC UVLO or the thermal shutdown protection function is activated. Always connect a capacitor to VTT pin for loop gain and phase compensation and for reduction in output voltage variation in the event of sudden load change. Be careful in choosing the capacitor as insufficient capacitance may cause oscillation and high ESR (Equivalent Series Resistance) may result in increased output voltage variation during a sudden change in load. A 10F or so ceramic capacitor is recommended, though ambient temperature and other conditions should also be considered. 7. EN A High input of 2.3V or higher to EN turns ON the VTT output. A Low input of 0.8V or less, on the other hand, turns VTT to a Hi-Z state. When EN terminal repeats ON/OFF, an inrush current may flow in VTT IN terminal. Please be careful about voltage Drop of the VTT IN line. www.rohm.com TSZ02201-0J2J0A900720-1-2 2014 ROHM Co., Ltd. All rights reserved. 2/16 TSZ22111 15 001 22.Jul.2015 Rev.002