GS4911B/GS4910B HD/SD/Graphics Clock and Timing Generator with GENLOCK
Key Features Description
The GS4911B is a highly flexible, digitally controlled clock
Video Clock Synthesis
synthesis circuit and timing generator with genlock capability. It
Generates any video or graphics clock up to 165MHz
can be used to generate video and audio clocks and timing signals,
Pre-programmed for 8 video and 13 graphics clocks
and allows multiple devices to be genlocked to an input reference.
Accuracy of free-running clock frequency limited only by
The GS4910B includes all the features of the GS4911B, but does
crystal reference
not offer audio clocks or AFS pulse generation.
One differential and two single-ended video/graphics clock
outputs
The GS4911B/GS4910B will recognize input reference signals
Each clock may be individually delayed for skew control
conforming to 36 different video standards and 16 different
Video output clock may be directly connected to Gennums
graphic formats, and will genlock the output timing information to
serializers for a SMPTE-compliant HD-SDI output
the incoming reference. The GS4911B/GS4910B supports
cross-locking, allowing the output to be genlocked to an incoming
Audio Clock Synthesis (GS4911B only)
reference that is different from the output video standard
Three audio clock outputs
selected.
Generates any audio clock up to 512*96kHz
The user may select to output one of 8 different video sample
Pre-programmed for 7 audio clocks
clock rates or 13 different graphic display clock rates, or may
program any clock frequency between 13.5MHz and 165MHz.
Timing Generation
The chosen clock frequency can be further divided using internal
Generates up to 8 timing signals at a time
dividers, and is available on two video clock outputs and one
Choose from 9 pre-programmed timing signals: H and V sync
LVDS video clock output pair. The video clocks are frequency and
and blanking, F Sync, F Digital, AFS (GS4911B only), Display
phased-locked to the horizontal timing reference, and can be
Enable, 10FID, and up to 4 user-defined timing signals
individually delayed with respect to the timing outputs for clock
Pre-programmed to generate timing for 35 different video
skew control.
formats and 13 different graphic display formats
Eight user-selectable timing outputs are provided that can
Genlock Capability
automatically produce the following timing signals for 35
Clocks may be free-running or genlocked to an input
different video formats and 13 different graphics formats: HSync,
reference with a variable offset step size of 100-200ps
Hblanking, VSync, Vblanking, F sync, F digital, AFS (GS4911B
(depending on exact clock frequency)
only), DE, and 10FID. These timing outputs may be locked to the
Variable timing offset step size of 100-200ps up to one frame
input reference signal for genlock timing and may be phase
Output may be cross-locked to a different input reference
adjusted via internal registers.
Freeze operation on loss of reference
In addition, the GS4911B provides three audio sample clock
Optional crash or drift lock on application of reference
outputs that can produce audio clocks up to 512fs with fs ranging
Automatic input format detection
from 9.7kHz to 96kHz. Audio to video phasing is accomplished by
an external 10FID input reference, a 10FID signal specified via
General Features
internal registers, or a user-programmed audio frame sequence.
Reduces design complexity and saves board space - 9mm x
9mm package plus crystal reference replaces multiple
The GS4911B/GS4910B is Pb-free, and the encapsulation
VCXOs, PLLs and timing generators
compound does not contain halogenated flame retardant (RoHS
Pb-free and RoHS Compliant
Compliant).
Low power operation typically 300mW
1.8V core and 1.8V or 3.3V I/O power supplies
64-PIN QFN package
Applications
Video cameras; Digital audio and/or video recording/play
back devices; Digital audio and/or video processing devices;
Computer/video displays; DVD/MPEG devices; Digital Set
top boxes; Video projectors; High definition video systems;
Multi-media PC applications
GS4911B/GS4910B HD/SD/Graphics Clock and Timing 1 of 119
www.gennum.com
Generator with GENLOCK
Data Sheet
36655 - 5 June 2009user[4:1]
27MHz
Input Reference TIMING_OUT_8
AFS
Rate Identification
10FID TIMING_OUT_7
REF_LOST
and Control
ref_rate
DE
TIMING_OUT_6
F digital
Flywheel and Video
TIMING_OUT_5
Crosspoint
F sync
Timing Generator
TIMING_OUT_4
V blanking
TIMING_OUT_3
V sync
TIMING_OUT_2
H blanking
Clock Synthesis
TIMING_OUT_1
H sync
and Control
PCLK1
Clock
Video Clock
PCLK2
pclk 3x Video Clock
Phase
Divide
Delay Adjust
PCLK3
Adjust
PCLK3
ACLK1
aclk_512
Audio Clock
ACLK2
aclk_384 Divide
ACLK3
HSYNC
VSYNC
FSYNC
10FID
Application Programming Interace
GS4911B Functional Block Diagram
GS4911B/GS4910B HD/SD/Graphics Clock and Timing 2 of 119
Generator with GENLOCK
Data Sheet
36655 - 5 June 2009
JTAG/HOST
SCLK_TCLK
SDIN_TDI
SDOUT_TDO
CS_TMS
X1
X2
ASR_SEL[2:0]
VID_STD[5:0]
GENLOCK
LOCK_LOST