SLG59M1639V Silego

SLG59M1639V SLG59M1639V Ultra-small 2-Channel 45 m/2 A Power Switch with Reverse-Current Blocking General Description Pin Configuration The SLG59M1639V is a dual-channel, 45 m pFET power switch designed to switch 1.5 to 5.5 V power rails up to 2 A in 1 8 VIN2 each channel. When either channel is enabled, reverse-cur- VOUT2 rent protection will quickly open the switch in the event of a reverse-voltage condition is detected (a V > V + 50 mV OUT IN 2 7 ON2 GND condition opens the switch). In the event that the channels V IN voltage is too low, the power switch also contains an internal NC ON1 3 6 V threshold monitor to keep or to turn the switch OFF. IN(UVLO) Each power switch is independently controlled via its own low-voltage compatible CMOS input. VOUT1 VIN1 4 5 Designed to operate over a -40C to 85C range, the 8-pin STDFN SLG59M1639V is available in a RoHS-compliant, ultra-small 1.6 x 1.0 mm STDFN package. (Top View) Features Integrated 2-Channel pFET Power Switch Applications 2 A Maximum Continuous Switch Current per Channel Power-Rail Switching: Low Typical RDS : ON Notebook/Laptop/Tablet PCs 45 m at V = 5 V IN Smartphones/Wireless Handsets 60 m at V = 2.5 V IN High-definition Digital Cameras 80 m at V = 1.5 V IN Set-top Boxes Operating Voltage: 1.5 V to 5.5 V Point of Sales Pins Reverse-current/voltage Protection GPS Navigation Devices Low-voltage CMOS Logic Compatible Switch Control Operating temperature range: -40 C to 85C Pb-Free / Halogen-Free / RoHS compliant packaging Block Diagram I I LOAD2 LOAD1 Reverse Reverse Voltage Voltage Protection Protection VOUT2 VOUT1 VIN2 VIN1 Logic Logic Control Control SW Closed SW Closed ON2 ON1 CMOS CMOS Input Input SW Open SW Open GND Datasheet Revision 1.07 17-Sep-2018 Page 1 of 11 2018 Dialog Semiconductor CFR0011-120-01SLG59M1639V Ultra-small 2-Channel 45 m/2 A Power Switch with Reverse-Current Blocking Pin Description Pin Pin Name Type Pin Description Input and source terminal of MOSFET 2. Bypass the VIN2 pin to GND with a 1 F (or 1 VIN2 MOSFET larger), low-ESR capacitor. ON2 turns Channel 2 MOSFET ON and is a low logic-level CMOS input with ON V <0.3V IL 2 ON2 Input and ON V > 1 V. As the ON2 input circuit does not have an internal pull-down resistor, IH connect ON2 pin directly to a GPIO controller do not allow this pin to be open circuited. ON1 turns Channel 1 MOSFET ON and is a low-logic level CMOS input with ON V <0.3V IL 3 ON1 Input and ON V > 1 V. As the ON1 input circuit does not have an internal pull-down resistor, IH connect ON1 pin directly to a GPIO controller do not allow this pin to be open circuited. Input and source terminal of MOSFET 1. Bypass the VIN1 pin to GND with a 1 F (or 4 VIN1 MOSFET larger), low-ESR capacitor. 5 VOUT1 MOSFET Output and drain terminal of MOSFET 1. 6 NC No Connect No connection. Do not make connection to any other pin - leave Pin 6 as an open circuit. 7 GND GND Ground connection. Connect this pin to system analog or power ground plane. 8 VOUT2 MOSFET Output and drain terminal of MOSFET 2. Ordering Information Part Number Type Production Flow SLG59M1639V STDFN Industrial, -40 C to 85 C SLG59M1639VTR STDFN (Tape and Reel) Industrial, -40 C to 85 C Datasheet Revision 1.07 17-Sep-2018 Page 2 of 11 2018 Dialog Semiconductor CFR0011-120-01