Si5013-D-GM Silicon Labs

Si5013 OC-12/3, STM-4/1 SONET/SDH CDR IC WITH LIMITING AMPLIFIER Features High-speed clock and data recovery device with integrated limiting amplifier: Supports OC-12/3, STM-4/1 Loss-of-signal level alarm Data slicing level control DSPLL technology 10 mV differential sensitivity Jitter generation 2.3 mUI (typ) PP rms 3.3 V supply Small footprint: 5 x 5 mm Reference and reference-less Ordering Information: operation supported See page 22. Applications SONET/SDH/ATM routers SONET/SDH test equipment Pin Assignments Add/drop multiplexers Optical transceiver modules Si5013 Digital cross connects SONET/SDH regenerators Board level serial links Description 28 27 26 25 24 23 22 RATESEL VDD 1 21 The Si5013 is a fully-integrated, high-performance limiting amplifier (LA) GND 2 20 REXT and clock and data recovery (CDR) IC for high-speed serial LOS LVL 3 19 RESET/CAL GND communication systems. It derives timing information and data from a SLICE LVL 4 18 VDD Pad serial input at OC-12/3 and STM-4/1 rates. Use of an external reference 5 17 REFCLK+ DOUT+ REFCLK 6 16 DOUT clock is optional. Silicon Laboratories DSPLL technology eliminates 7 15 LOL TDI sensitive noise entry points, thus making the PLL less susceptible to 8 9 10 11 12 13 14 board-level interaction and helping to ensure optimal jitter performance. The Si5013 represents a new standard in low jitter, low power, small size, and integration for high-speed LA/CDRs. It operates from a 3.3 V supply over the industrial temperature range (40 to 85 C). Functional Block Diagram LOS LVL Signal DSQLCH Detect LOS 2 DOUT+ Retimer BUF DOUT 2 DIN+ Limiting DSPLL DIN Amp 2 CLKOUT+ BER BUF CLKOUT Monitor CLK DSBL REFCLK+ 2 Lock REFCLK Detection (Optional) Reset/ Bias Gen. Calibration BER ALM REXT RESET/CAL RATESEL SLICE LVL BER LVL LOL LTR Rev. 1.6 6/08 Copyright 2008 by Silicon Laboratories Si5013 LTR NC LOS BER ALM DSQLCH BER LVL VDD VDD DIN+ CLKDSBL DIN CLKOUT+ VDD CLKOUTSi5013 2 Rev. 1.6