SI5110-H-BL Silicon Labs

Si5110 SiPHY OC-48/STM-16 SONET/SDH TRANSCEIVER Features Complete low-power, high-speed, SONET/SDH transceiver with integrated limiting amp, CDR, CMU, and MUX/DEMUX. Si5110 Data rates supported: SONET-compliant loop-timed OC-48/STM-16 through 2.7 Gbps operation FEC Programmable slicing level and Low-power operation 1.0 W (typ) sample phase adjustment LVDS parallel interface DSPLL based clock multiplier unit Single supply 1.8 V operation with selectable loop filter Bottom View bandwidths 11 x 11 mm BGA package Integrated limiting amplifier Ordering Information: Diagnostic and line loopbacks See page 32. Applications SONET/SDH transmission Optical transceiver modules systems SONET/SDH test equipment Description The Si5110 is a complete low-power transceiver for high-speed serial communication systems operating between OC-48 and 2.7 Gbps. The receive path consists of a fully-integrated limiting amplifier, clock and data recovery unit (CDR), and 1:4 deserializer. The transmit path combines a low-jitter clock multiplier unit (CMU) with a 4:1 serializer. The CMU uses Silicon Laboratories DSPLL technology to provide superior jitter performance while reducing design complexity by eliminating external loop filter components. To simplify BER optimization in long haul applications, programmable slicing and sample phase adjustment are supported. The Si5110 operates from a single 1.8 V supply over the industrial temperature range (20 to 85 C). Functional Block Diagram SLICELVL PHASEADJ RXDOUT 3:0 Limiting RXDIN CDR AMP Diagnostic Loopback Line RXCLK Loopback TXDOUT TXDIN 3:0 TM TXCLKOUT DSPLL TXCLK4IN TX CMU REFCLK BWSEL 1:0 Rev. 1.5 11/12 Copyright 2012 by Silicon Laboratories Si5110 Not Recommended for New Designs 4:1 1:4 MUX DEMUXSi5110 2 Rev. 1.5 Not Recommended for New Designs