SL28PCIe26 EProClock PCI Express Gen 2 & Gen 3 Generator EProClock Programmable Technology Features 2 I C support with readback capabilities Optimized 100 MHz Operating Frequencies to Meet the Triangular Spread Spectrum profile for maximum Next Generation PCI-Express Gen 2 & Gen 3 electromagnetic interference (EMI) reduction Low power push-pull type differential output buffers 25MHz Crystal Input or Clock input Integrated voltage regulator o o Industrial Temperature -40 C to 85 C Integrated resistors on differential clocks 3.3V Power supply Four 100-MHz differential PCI-Express clocks 32-pin QFN package Low jitter (<50pS) Block Diagram Pin Configuration DOC : SP-AP-0774 (Rev. 0.2) Page 1 of 14 400 West Cesar Chavez, Austin, TX 78701 1+(512) 416-8500 1+(512) 416-9669 www.silabs.com Not Recommended for New Designs SL28PCIe26 32-QFN Pin Definitions Pin No. Name Type Description 1 VDD PWR 3.3V Power Supply 2 VSS GND Ground 3 NC NC No Connect. 4 NC NC No Connect. 5 VDD PWR 3.3V Power Supply 6 NC NC No Connect. 7 NC NC No Connect. 8 VSS GND Ground 9 VSS GND Ground 10 SRC0 O, DIF 100MHz True differential serial reference clock 11 SRC0 O, DIF 100MHz Complement differential serial reference clock 12 VSS GND Ground 13 SRC1 O, DIF 100MHz True differential serial reference clock 14 SRC1 O, DIF 100MHz Complement differential serial reference clock 15 VDD PWR 3.3V Power Supply 16 NC NC No Connect. 17 VDD PWR 3.3V Power Supply 18 VDD PWR 3.3V Power Supply 19 SRC2 O, DIF 100MHz Complement differential serial reference clock 20 SRC2 O, DIF 100MHz True differential serial reference clock 21 VSS GND Ground 22 SRC3 O, DIF 100MHz Complement differential serial reference clock 23 SRC3 O, DIF 100MHz True differential serial reference clock 24 VDD PWR 3.3V Power Supply 25 CKPWRGD/PD I 3.3V LVTTT input pin. When PD is asserted low, the device will power down. 26 VSS GND Ground 27 XOUT O, SE 25MHz Crystal output, Float XOUT if using CLKIN (Clock Input) 28 XIN/CLKIN I 25MHz Crystal input or 3.3V, 25MHz Clock Input 29 VDD PWR 3.3V Power Supply 30 NC NC No Connect. 31 SDATA I/O SMBus compatible SDATA 32 SCLK I SMBus compatible SCLOCK EProClock Programmable Technology EProClock is the worlds first non-volatile programmable - Differential duty cycle control on true or compliment or both clock. The EProClock technology allows board designer to - Differential amplitude control promptly achieve optimum compliance and clock signal - Differential slew rate control integrity historically, attainable typically through device and/or board redesigns. - Program different spread profiles and modulation rates EProClock technology can be configured through SMBus or hard coded. Serial Data Interface Features: - > 4000 bits of configurations To enhance the flexibility and function of the clock synthesizer, a two-signal serial interface is provided. Through the Serial - Can be configured through SMBus or hard coded Data Interface, various device functions, such as individual - Custom frequency sets clock output buffers are individually enabled or disabled. The - Differential skew control on true or compliment or both registers associated with the Serial Data Interface initialize to DOC : SP-AP-0774 (Rev. 0.2) Page 2 of 14 Not Recommended for New Designs