74VHC157TTR STMicroelectronics

74VHC157 QUAD 2 CHANNEL MULTIPLEXER HIGH SPEED: t = 4.1 ns (TYP.) at V = 5V PD CC LOW POWER DISSIPATION: I = 4 A (MAX.) at T =25C CC A HIGH NOISE IMMUNITY: V = V = 28% V (MIN.) NIH NIL CC POWER DOWN PROTECTION ON INPUTS SOP TSSOP SYMMETRICAL OUTPUT IMPEDANCE: I = I = 8 mA (MIN) OH OL BALANCED PROPAGATION DELAYS: Table 1: Order Codes t t PLH PHL PACKAGE T & R OPERATING VOLTAGE RANGE: V (OPR) = 2V to 5.5V SOP 74VHC157MTR CC PIN AND FUNCTION COMPATIBLE WITH TSSOP 74VHC157TTR 74 SERIES 157 IMPROVED LATCH-UP IMMUNITY input is held high selection of data is inhibited and LOW NOISE: V = 0.8V (MAX.) OLP all the outputs become low. The SELECT decoding determines whether the A or B inputs DESCRIPTION get routed to their corresponding Y outputs. The 74VHC157 is an advanced high-speed Power down protection is provided on all inputs CMOS QUAD 2-CHANNEL MULTIPLEXER and 0 to 7V can be accepted on inputs with no fabricated with sub-micron silicon gate and regard to the supply voltage. This device can be 2 double-layer metal wiring C MOS technology. used to interface 5V to 3V. All inputs and outputs It consists of four 2-input digital multiplexer with are equipped with protection circuits against static common select and strobe inputs. It is a discharge, giving them 2KV ESD immunity and non-inverting multiplexer. When the STROBE transient excess voltage. Figure 1: Pin Connection And IEC Logic Symbols Rev. 4 November 2004 1/12 Obsolete Product(s) - Obsolete Product(s)74VHC157 Figure 2: Input Equivalent Circuit Table 2: Pin Description PIN N SYMBOL NAME AND FUNCTION 1 SELECT Common Data Select Inputs 2, 5, 11, 14 1A to 4A Data Inputs From Source A 3, 6, 10, 13 1B to 4B Data Inputs From Source B 4, 7, 9, 12 1Y to 4Y Multiplexer Outputs 15 STROBE Strobe Input 8 GND Ground (0V) Positive Supply Voltage 16 V CC Table 3: Truth Table INPUTS OUTPUT STROBE SELECT A B Y H XXX L LLL X L LL H X H LH X L L LH X H H X : Dont care Figure 3: Logic Diagram 2/12 Obsolete Product(s) - Obsolete Product(s)