HCF4014B SYNCHRONOUS PARALLEL OR SERIAL IN/SERIAL OUT 8 - STAGE STATIC SHIFT REGISTER MEDIUM SPEED OPERATION : 12 MHz (Typ.) At V = 10V DD FULLY STATIC OPERATION 8 MASTER-SLAVE FLIP-FLOPS PLUS OUTPUT BUFFERING AND CONTROL GATING DIP SOP QUIESCENT CURRENT SPECIFIED UP TO 20V 5V, 10V AND 15V PARAMETRIC RATINGS INPUT LEAKAGE CURRENT ORDER CODES I = 100nA (MAX) AT V =18VT = 25C I DD A PACKAGE TUBE T & R 100% TESTED FOR QUIESCENT CURRENT DIP HCF4014BEY MEETS ALL REQUIREMENTS OF JEDEC SOP HCF4014BM1 HCF4014M013TR JESD13B STANDARD SPECIFICATIONS FOR DESCRIPTION OF B SERIES CMOS DEVICE from stages 6 and 7. Parallel as well as serial DESCRIPTION entry is made into the register synchronously with The HCF4014B is a monolithic integrated circuit the positive clock line transition. In this device, fabricated in Metal Oxide Semiconductor entry is controlled by the PARALLEL/SERIAL CONTROL input. When the PARALLEL/SERIAL technology available in DIP and SOP packages. This device is an 8-stage parallel or serial input/ CONTROL input is low, data is serially shifted into serial output register having common CLOCK and the 8-stage register synchronously with the positive transition of he clock line. When the PARALLEL/SERIAL CONTROL inputs, a single SERIAL data input, and individual parallelJA PARALLEL/SERIAL CONTROL input is high, data inputs to each register stage. Each register stage is jammed into the 8-stage register via the parallel is a D-type, master-slave flip-flop in addition to an input lines and synchronous with the positive output from stage 8, outputs are also available transition of the clock line. PIN CONNECTION October 2002 1/10HCF4014B IINPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No SYMBOL NAME AND FUNCTION 7, 6, 5, 4, 13, PI1 to PI8 Parallel Input 14, 15, 1 11 SERIAL IN Serial Input PARALLEL/ Parallel/Serial Input Con- 9 SERIAL trol CONTROL 10 CLOCK Clock Input 2, 3, 12 Q6, Q7, Q8 Buffered Outputs V 8 Negative Supply Voltage SS V 16 Positive Supply Voltage DD TRUTH TABLE PARALLEL/ Q 1 Q CLOCK SERIAL INPUT SERIAL PI-1 PI- n n (INTERNAL) CONTROL X 100 00 X 110 10 X 101 01 X 111 11 Q -1 00 X X 0 n 10 X X 1 Q -1 n Q Q XXXX 1 n LOGIC DIAGRAM 2/10