HCF4024B RIPPLE-CARRY BINARY COUNTER/DIVIDERS 7 STAGE MEDIUM SPEED OPERATION : t = 80ns (Typ.) at V = 10V PD DD FULLY STATIC OPERATION COMMON RESET BUFFERED INPUTS AND OUTPUTS STANDARDIZED SYMMETRICAL OUTPUT DIP SOP CHARACTERISTICS QUIESCENT CURRENT SPECIFIED UP TO 20V 5V, 10V AND 15V PARAMETRIC RATINGS ORDER CODES INPUT LEAKAGE CURRENT PACKAGE TUBE T & R I = 100nA (MAX) AT V = 18V T = 25C I DD A DIP HCF4024BEY 100% TESTED FOR QUIESCENT CURRENT SOP HCF4024BM1 HCF4024M013TR MEETS ALL REQUIREMENTS OF JEDEC JESD13B STANDARD SPECIFICATIONS FOR DESCRIPTION OF B SERIES CMOS state of a counter advances one count on the DEVICE negative transition of each input pulse a high level on the RESET line resets the counter to its all zeros stage. Schmitt trigger action on the input DESCRIPTION pulse line permits unlimited clock rise and fall The HCF4024B is a monolithic integrated circuit times. fabricated in Metal Oxide Semiconductor All inputs and outputs are buffered technology available in DIP and SOP packages. The HCF4024B is a ripple carry binary counter. All counter stages are master-slave flip-flops. The PIN CONNECTION September 2001 1/10HCF4024B IINPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No SYMBOL NAME AND FUNCTION 12, 11, 9, 6, Q1 to Q7 7 Buffered Outputs 5, 4, 3 8, 10, 13 NC Not Connected 2 RESET Reset Input 1 Input Pulses V 7 Negative Supply Voltage SS V 14 Positive Supply Voltage DD FUNCTIONAL DIAGRAM TRUTH TABLE RESET OUTPUT STATE X H ALL OUTPUTS = L NO CHANGE L ADVANCE TO NEXT STATE X : Dont Care 2/10