STA2065 Cartesio family Infotainment application processor with embedded GPS Data brief production data Features ARM1176 754/624/533 MHz host processor Cache: 32 KB instruction, 32 KB data 0 03 Vector floating point unit TFBGA372+100 (16x16x1.2mm) High performance embedded GPS subsystem Parallel acquisition engines for 8 GPS Audio interfaces and features satellites or 4 Galileo satellites Four multichannel serial ports (I2S/TDM) 32 tracking channels for all satellites in view SPDIF input interface 5 correlators per channel for urban canyon C3 hardware reed-solomon decoder robustness Sample rate converter Multibit signal processing hardware Standard interfaces Advanced power management Four 16-bit input capture/output compare Separated power islands for ultra low Pulse width light modulator (PWL) power mode Four autobaud UART 2 Dynamic core frequency scaling Three I C multimaster/slave interfaces 512-Byte embedded SRAM for back-up Two synchronous serial port (SSP, SPI) System infrastructure Smartcard interface LP DDR/DDR2 controller: 16/32-bit data 160 GPIO over 5 32-bit ports 512 MB addressable (333 MHz DDR2, Two controllers area network (CAN) in 200 MHz LPDDR) automotive versions One bank of 32 KB embedded SRAM Programmable voltage IOs: 1.8 V, 2.5 V, 3.3 V 64-channel vector interrupt controller (VIC) V : 1.8 10%V, V : V , 1.25 3%V DDIO ON DD ON DD 2 DMA controllers, 16 physical channels TFBGA 372+100 0.65 mm pitch package, 32 DMA request for each controller packing in tray Two external DMA requests are supported Ambient temperature range: -40 / +85 C Display and graphics Table 1. Device summary Color LCD controller for STN,TFT or HR- TFT panels with 24-bit parallel RGB Order code Grade CPU freq. CAN interface STA2065N2 Consumer 533 MHz No Integrated touch screen controller and ADC STA2065P2 Consumer 624 MHz No 3D advanced graphics acceleration Video input port (VIP) interface STA2065Z2 Consumer 754 MHz No JPEG baseline profile decoder STA2065A2 Automotive 533 MHz 2x High throughput interfaces STA2065X2 Automotive 624 MHz 2x 2 ports USB 2.0 OTG with integrated STA2065Y2 Automotive 754 MHz 2x physical layers 3 SD/MMC up to 8 bit data, all bootable September 2013 Doc ID 16050 Rev 5 1/20 This is information on a product in full production. For further information contact your local STMicroelectronics sales www.st.com 20 office.Contents STA2065 Contents 1 Description . 4 2 System block diagram description . 5 2.1 MCU 5 2.2 Embedded memories . 5 2.2.1 Embedded SRAM (eSRAM) 5 2.3 System functions 5 2.3.1 System and reset controller (SRC) . 5 2.3.2 PMU . 5 2.3.3 DMA . 5 2.3.4 Vectored interrupt controller (VIC) 5 2.3.5 GPIOs . 5 2.3.6 Real time clock (RTC) . 6 2.3.7 Real time timer (RTT) . 6 2.3.8 Always ON supply 6 2.3.9 Enhanced function timer (EFT) 6 2.3.10 Watchdog timer (WDT) 6 2.4 Memory interfaces . 6 2.4.1 Flexible static memory controller (FSMC) 6 2.4.2 SD/MMC . 7 2.4.3 DDR-SDRAM controller 7 2.4.4 Smart card interface 7 2.5 Audio/video functions . 7 2.5.1 C3 7 2.5.2 Sample rate converter (SaRaC) . 8 2.5.3 JPEG decoder . 8 2.5.4 Video input 8 2.5.5 Smart graphics accelerator (SGA) 8 2.5.6 Color LCD controller (CLCD) 8 2.6 Communication interfaces . 9 2.6.1 USB . 9 2.6.2 UART 9 2.6.3 I2C 9 2.6.4 MSP . 9 2/20 Doc ID 16050 Rev 5