STHDLS101AQTR STMicroelectronics

STHDLS101A Enhanced AC coupled HDMI level shifter with configurable HPD output Features Converts low-swing alternating current (AC) coupled differential input to high-definition multimedia interface (HDMI) rev 1.3 compliant HDMI level shifting operation up to 2.7 Gbps per lane Integrated 50 termination resistors for AC- coupled differential inputs QFN48 Input/output transition minimized differential (7x7mm) signaling (TMDS) enable/disable Output slew rate control on TMDS outputs to minimize electromagnetic interference (EMI) and eliminate external components such as RC and choke Description Fail safe outputs for backdrive protection The STHDLS101A is a high-speed high-definition No re-timing or configuration required multimedia interface (HDMI) level shifter that Inter-pair output skew < 250 ps, intra-pair converts low-swing AC coupled differential input output skew < 10 ps to HDMI 1.3 compliant open-drain current steering RX-terminated differential output. Single power supply of 3.3 V Through the existing PCI-E pins in the graphics ESD protection: 6 KV HBM on all I/O pins and memory controller hub (GMCH) of PCs or Integrated display data channel (DDC) level notebook motherboards, the pixel clock provides shifters. Pass-gate voltage limiters allow 3.3 V the required bandwidth (1.65 Gbps, 2.25 Gbps) termination on graphics and memory controller for the video supporting 720p, 1080i, 1080p with a hub (GMCH) pins and 5 V DDC termination on total of 36-bit resolution. The HDMI is multiplexed HDMI connector pins onto the PCIe pins in the motherboard where the AC coupled HDMI at 1.2 V is output by GMCH. Level shifter and configurable output for HPD The AC coupled HDMI is then level shifter by this signal from HDMI/DVI connector device to 3.3 V DC coupled HDMI output. Integrated pull-down resistor on HPD SINK The STHDLS101A supports up to 2.7 Gbps, and OE N inputs which is enough for 12-bits of color depth per channel, as indicated in HDMI rev 1.3. Applications The device operates from a single 3.3 V supply Notebooks, PC motherboards and graphic and is available in a 48-pin QFN package. cards Table 1. Device summary Order code Package Packing QFN48 STHDLS101AQTR Tape and reel (7 x 7 x 1 mm) June 2009 Doc ID 15756 Rev 1 1/24 www.st.com 24 Obsolete Product(s) - Obsolete Product(s) Contents STHDLS101A Contents 1 Block diagram 3 2 System interface 4 3 Pin configuration 6 3.1 Pin description 7 4 Functional description 11 5 Maximum ratings . 13 5.1 Recommended operating conditions 14 5.1.1 Power supply and temperature range 14 5.1.2 Differential inputs (IN D signals) 14 5.2 TMDS outputs (OUT D signals) 15 5.3 HPD input and output characteristics 16 5.4 DDC input and output chatacteristics 17 5.5 OE input characteristics . 18 5.6 HPD input resistor 18 5.7 ESD performance . 18 6 Application information . 19 6.1 Power supply sequencing . 19 6.2 Supply bypassing . 19 6.3 Differential traces . 19 7 Package mechanical data 20 8 Revision history . 23 2/24 Doc ID 15756 Rev 1 Obsolete Product(s) - Obsolete Product(s)