TSM9933DCS -20V P-Channel Power MOSFET SOP-8 Pin Definition: Key Parameter Performance 1. Source 1 8. Drain 1 Parameter Value Unit 2. Gate 1 7. Drain 1 3. Source 2 6. Drain 2 V -20 V DS 4. Gate 2 5. Drain 2 V = -4.5V 60 GS V = -2.7V R (max) 78 m DS(on) GS V = -2.5V GS 85 Q 6 nC g Block Diagram Features Advance Trench Process Technology High Density Cell Design for Ultra Low On-resistance Ordering Information Part No. Package Packing TSM9933DCS RLG SOP-8 2.5kps / 13 Reel Note: G denotes for Halogen- and Antimony-free as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and <1000ppm antimony compounds Dual P-Channel MOSFET Absolute Maximum Ratings (T =25C unless otherwise noted) A Parameter Symbol Limit Unit Drain-Source Voltage V -20 V DS Gate-Source Voltage V 12 V GS Continuous Drain Current, V 4.5V. I -4.7 A GS D Pulsed Drain Current, V 4.5V I -20 A GS DM (Note 1,2) Continuous Source Current (Diode Conduction) I -2.5 A S T =25C 2 A Maximum Power Dissipation P W D T =70C 1.3 A Operating Junction Temperature T +150 C J Operating Junction and Storage Temperature Range T , T - 55 to +150 C J STG Thermal Performance Parameter Symbol Limit Unit Junction to Case Thermal Resistance R 30 C/W JC Junction to Ambient Thermal Resistance (PCB mounted) R 62.5 C/W JA Document Number: DS P0000157 1 Version: E15 TSM9933DCS -20V P-Channel Power MOSFET Electrical Specifications (T =25C unless otherwise noted) J Parameter Conditions Symbol Min Typ Max Unit (Note 3) Static Drain-Source Breakdown Voltage V = 0V, I = -250A BV -20 -- -- V GS D DSS Gate Threshold Voltage V = V , I = -250A V -0.6 -- -1.4 V DS GS D GS(TH) Gate Body Leakage V = 12V, V = 0V I -- -- 100 nA GS DS GSS Zero Gate Voltage Drain Current V = -20V, V = 0V I -- -- -1.0 A DS GS DSS On-State Drain Current V =-5V, V = -4.5V I -15 -- -- A DS GS D(ON) V = -4.5V, I = -4.7A -- 48 60 GS D V = -4.5V, I = -2.9A -- 47 58 GS D Drain-Source On-State Resistance R m DS(ON) V = -2.7V, I = -1.5A GS D -- 60 78 V = -2.5V, I = -3.8A -- 65 85 GS D Forward Transconductance V = -10V, I = -4.7A g -- 11 -- S DS D fs Diode Forward Voltage I = -1.7A, V = 0V V -- -0.8 -1.2 V S GS SD (Note 4,5) Dynamic Q -- 6 9 Total Gate Charge g V = -10V, I = -4.7A, DS D Q -- 1.4 -- Gate-Source Charge nC gs V = -4.5V GS Q -- 1.9 -- Gate-Drain Charge gd C -- 640 -- Input Capacitance iss V = -10V, V = 0V, DS GS Output Capacitance C -- 180 -- pF oss f = 1.0MHz C -- 90 -- Reverse Transfer Capacitance rss (Note 4,5) Switching t -- 35 Turn-On Delay Time d(on) 22 V = -10V, R = 10, DD L t -- 35 55 Turn-On Rise Time r I = -1A, V = -4.5V, ns D GEN t -- 45 70 Turn-Off Delay Time d(off) R = 6 G t -- 25 50 Turn-Off Fall Time f Notes: 1. Pulse width limited by the Maximum junction temperature 2. Surface Mounted on FR4 Board, t 5 sec. 3. pulse test: PW 300s, duty cycle 2% 4. For DESIGN AID ONLY, not subject to production testing. 5. Switching time is essentially independent of operating temperature. Document Number: DS P0000157 2 Version: E15