TMP91FW27UG(C,JZ) Toshiba

TOSHIBA Original CMOS 16-Bit Microcontroller TLCS-900/L1 Series TMP91FW27UG TMP91FW27FG Semiconductor Company Preface Thank you very much for making use of Toshiba microcomputer LSI. Before using this LSI, refer to section Points of Note and Restrictions. Especially, take care below cautions. **CAUTION** How to release the HALT mode Usually, interrupts can release all halts stats. However, the interrupts = (NMI, INT0, INTRTC), which can release the HALT mode may not be able to do so if they are input during the period CPU is shifting to the HALT mode (for about 5 clocks of f ) with IDLE1 or STOP mode (IDLE2 is not applicable to this case). FPH (In this case, an interupt request is kept on hold internally.) If another interupt is generated after it has shifted to HALT mode completely, halt status can be released without difficultly. The priority of this interrupt is compare with that of the interrupt kept on hold internally, and the interrupt with higher priority is handled first followed by the other interrupt.