TMPM4G Group(1) Datasheet CMOS Digital Integrated Circuit Silicon Monolithic LQFP176(20x20mm, 0.4mm pitch) LQFP144(20x20mm, 0.5mm pitch) TMPM4G Group(1) LQFP128(14x14mm, 0.4mm pitch) LQFP100(14x14mm, 0.5mm pitch) General Description VFBGA177(13x13mm, 0.8mm pitch) VFBGA145(12x12mm, 0.8mm pitch) Arm Cortex-M4( with FPU) Frequency: 1 to 160 MHz, Operation voltage: 2.7 to 3.6 V Code Flash: 512 KB to 1536 KB. Data Flash: 32KB Built-in High speed 12-bit AD converter and plenty of timers/serial channels Applications TMPM4G group(1) integrates widely used for the equipment in which high speed data procedure is required, such as OA/digital products, industrial equipment, and others. Features Arm Cortex-M4( with FPU) I/O ports: 87 to 155 (Input: 4, Output: 1) Operation frequency: 1 to 160 MHz Enable to select Pull-up/Pull-down resistor, Open-drain Memory Protection Unit (MPU) 5V tolerant, 3V tolerant Supply voltage and power consumption On-chip debug (JTAG/SW) and NBDIF (RAM monitor) Operation voltage: 2.7 to 3.6 V Trigger Selector (TRGSEL) Low-power consumption operation: IDLE, STOP1, and STOP2 Expand trigger requests for DMA Controller, Timer counter, and Operation temperature: others. - 40 to +85 operation frequency 1 to 120 MHz DMA Controller: 3 units - 40 to +70 operation frequency 1 to 160 MHz MDMAC: 1 unit, Internal memory DMA requests: 30 to 32 factors, internal/external triggers Code Flash: 512 KB to 1536 KB, rewritable up to 10,000 times HDMAC: 2 units, Data Flash: 32 KB, rewritable up to 100,000 times DMA requests: 13 to 15 factors, internal/external triggers Data Flash is rewritable during instruction execution External bus interface(EBIF) RAM: 128 KB to 192 KB and Backup RAM: 2 KB (all products) Expandable to 64MB(Program/data) Clock External data bus(separate bug/multiplexed bun): 8/16 bit width External high speed oscillator: 8 MHz to 20 MHz (Ceramic and Chip select controller: 4 channels Crystal) Asynchronous serial communication External high speed clock input: 8 to 20 MHz UART: 3 to 6 channels, 5.0 Mbps (Max). FIFO (Transmission Internal high speed oscillator1 (IHOSC1):10MHz, user trimming 8 stage and Reception 8 stage) function FUART: 1 or 2 channels, 2.5Mbps (Max). FIFO (Transmission Internal high speed oscillator2 (IHOSC2):10MHz 32 stage and Reception 32 stage) and IrDA 115.2Kbps (Max). PLL: 160 MHz output Serial Peripheral Interface (TSPI): 5 to 9 channels External low speed oscillator: 32.768 kHz SIO/SPI mode, 25 Mbps (Max) Oscillation Frequency Detectior (OFD): Abnormal system clock FIFO (Transmission 16bit x 8 stage and Reception 16bit x 8 detection stage) Voltage Detection (LVD): 7 levels. selection between interrupts 2 2 I C Interface (I C): 3 to 5 channels and reset outputs Multi master, standard mode/fast mode available Interrupt Serial Memory Interface (SMIF): 1 channel External: 12 to 16 factors. Integrate digital noise filters (DNF). Connectable to two SPI FLASH Internal: 91 to 124 factors Start of commercial production 2019-2 2019-03-26 1 / 132 Rev.4.2 2018-2019 Toshiba Electronic Devices & Storage Corporation TMPM4G Group(1) Datasheet Consumer Electronics Control Circuit (CEC): 1 channel 8-bit DA converter (DAC): 2 channels 12-bit AD converter (ADC): 16 to 24 channel inputs Sample and hold circuit Conversion time: 1.0 s fADCLK = 60 MHz Advanced Programmable Motor Control Circuit (A-PMD): 1 channel 3 phase PWM output, Synchronized with 12-bit ADC Emergency stop function by external inputs (EMG0 pin and OVV0 pin) 32-bit Timer Event Counter (T32A) 28 channels as 16-bit Timers:14 channels as 32-bit Timers Interval Timer, event counter, input capture, phase difference input, PPG output, Sync Start,Trigger Start Interval Sensor Detection circuit (ISD): 3 units 4 inputs per unit Sampling 12 inputs at maximum simultaneously in Unit synchronous mode Low speed oscillator (32.768 kHz) and 32-bit timer output can be used as sampling clock Long Term Timer (LTTMR): 1 channel Interval time of 0.1s to 6553.5s can be set Real-time Clock (RTC): 1 channel Clock Selective Watchdog Timer (SIWDT): 1 channel Clocks other than the system clock can be selected. Clear window, interrupts and reset outputs Remote Control Signal Preprocessor (RMC): 1 to 2channels Supports boundary scan(BSC) 2019-03-26 2 / 132 Rev.4.2