VS-80RIA...PbF, VS-81RIA...PbF, VS-82RIA...PbF Series www.vishay.com Vishay Semiconductors Phase Control Thyristors (Stud Version), 80 A FEATURES Hermetic glass-metal seal International standard case TO-94 (TO-209AC) Designed and qualified for industrial level Material categorization: For definitions of compliance TO-94 (TO-209AC) please see www.vishay.com/doc 99912 TYPICAL APPLICATIONS DC motor controls Controlled DC power supplies PRIMARY CHARACTERISTICS AC controllers I 80 A T(AV) V /V 400 V, 800 V, 1200 V DRM RRM V 1.60 V TM I 120 mA GT T -40 C to +125 C J Package TO-94 (TO-209AC) Circuit configuration Single SCR MAJOR RATINGS AND CHARACTERISTICS PARAMETER TEST CONDITIONS VALUES UNITS 80 A I T(AV) T 85 C C I 125 T(RMS) 50 Hz 1900 A I TSM 60 Hz 1990 50 Hz 18 2 2 I t kA s 60 Hz 16 V /V 400 to 1200 V DRM RRM t Typical 110 s q T -40 to +125 C J ELECTRICAL SPECIFICATIONS VOLTAGE RATINGS V /V , MAXIMUM REPETITIVE V , MAXIMUM NON-REPETITIVE I /I MAXIMUM DRM RRM RSM DRM RRM VOLTAGE TYPE NUMBER PEAK AND OFF-STATE VOLTAGE PEAK VOLTAGE AT T = 125 C J CODE V V mA 40 400 500 VS-80RIA 80 800 900 15 VS-81RIA 120 1200 1300 Revision: 27-Sep-17 Document Number: 94392 1 For technical questions within your region: DiodesAmericas vishay.com, DiodesAsia vishay.com, DiodesEurope vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000VS-80RIA...PbF, VS-81RIA...PbF, VS-82RIA...PbF Series www.vishay.com Vishay Semiconductors ABSOLUTE MAXIMUM RATINGS PARAMETER SYMBOL TEST CONDITIONS VALUESUNITS 80 A Maximum average on-state current I 180 conduction, half sine wave T(AV) at case temperature 85 C Maximum RMS on-state current I DC at 75 C case temperature 125 T(RMS) t = 10 ms 1900 No voltage reapplied t = 8.3 ms 1990 A Maximum peak, one-cycle I TSM non-repetitive surge current t = 10 ms 1600 100 % V RRM reapplied t = 8.3 ms 1675 Sinusoidal half wave, initial T = T maximum t = 10 ms J J 18 No voltage t = 8.3 ms 16 2 2 2 Maximum I t for fusing I t kA s t = 10 ms 12.7 100 % V RRM t = 8.3 ms reapplied 11.7 2 2 2 Maximum I t for fusing I t t = 0.1 ms to 10 ms, no voltage reapplied 180.5 kA s Low level value of threshold voltage V (16.7 % x x I < I < x I ), T = T maximum 0.99 T(TO)1 T(AV) T(AV) J J V High level value of threshold voltage V (I > x I ), T = T maximum 1.13 T(TO)2 T(AV) J J Low level value of on-state slope resistance r (16.7 % x x I < I < x I ), T = T maximum 2.29 t1 T(AV) T(AV) J J m High level value of on-state slope resistance r (I > x I ), T = T maximum 1.84 t2 T(AV) J J Maximum on-state voltage V I = 250 A, T = 25 C, t = 10 ms sine pulse 1.60 V TM pk J p Maximum holding current I 200 H T = 25 C, anode supply 12 V resistive load mA J Typical latching current I 400 L SWITCHING PARAMETER SYMBOL TEST CONDITIONS VALUESUNITS T = 125 C, V = Rated V , I = 2 x dI/dt snubber J d DRM TM Maximum non-repetitive rate of dI/dt 0.2 F, 15 , gate pulse: 20 V, 65 , t = 6 s, t = 0.5 s 300 A/s p r rise of turned-on current Per JEDEC standard RS-397, 5.2.2.6. Gate pulse: 10 V, 15 source, t = 6 s, t = 0.1 s, p r Typical delay time t 1 d V = Rated V , I = 50 Adc, T = 25 C d DRM TM J s I = 50 A, T = T maximum, dI/dt = -5 A/s, V = 50 V, TM J J R Typical turn-off time t 110 q dV/dt = 20 V/s, gate bias: 0 V 25 , t = 500 s p BLOCKING PARAMETER SYMBOL TEST CONDITIONS VALUESUNITS Maximum critical rate of rise of dV/dt T = 125 C exponential to 67 % rated V 500 V/s J DRM off-state voltage Maximum peak reverse and I , RRM T = 125 C rated V /V applied 15 mA J DRM RRM off-state leakage current I DRM Revision: 27-Sep-17 Document Number: 94392 2 For technical questions within your region: DiodesAmericas vishay.com, DiodesAsia vishay.com, DiodesEurope vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000