P GND V IN NC GL C GND V DRV SiC638, SiC638A www.vishay.com Vishay Siliconix 50 A VRPower Integrated Power Stage DESCRIPTION FEATURES Thermally enhanced PowerPAK MLP55-31L The SiC638 are integrated power stage solutions optimized package for synchronous buck applications to offer high current, high efficiency, and high power density performance. Packaged Vishays Gen IV MOSFET technology and a low in Vishays proprietary 5 mm x 5 mm MLP package, SiC638 side MOSFET with integrated Schottky diode enables voltage regulator designs to deliver up to 50 A Delivers up to 50 A continuous current continuous current per phase. High efficiency performance The internal power MOSFETs utilizes Vishays High frequency operation up to 1.5 MHz state-of-the-art Gen IV TrenchFET technology that delivers Power MOSFETs optimized for 19 V input stage industry benchmark performance to significantly reduce switching and conduction losses. 3.3 V, 5 V PWM logic with tri-state and hold-off Zero current detect control for light load efficiency The SiC638 incorporate an advanced MOSFET gate driver improvement IC that features high current driving capability, adaptive dead-time control, an integrated bootstrap Schottky diode, Low PWM propagation delay (< 20 ns) a thermal warning (THWn) that alerts the system of Faster disable excessive junction temperature, and zero current detection Thermal monitor flag to improve light load efficiency. The drivers are also Under voltage lockout for V compatible with a wide range of PWM controllers an d CIN supports tri-state PWM, 3.3 V, 5 V PWM logic. Material categorization: for definitions of compliance please see www.vishay.com/doc 99912 APPLICATIONS Multi-phase VRDs for computing, graphics card an d memory Intel IMVP-8 VRPower delivery - V , V , V Skylake, Kabylak e CORE GRAPHICS SYSTEM AGENT platforms - V for Apollo Lake platforms CCGI Up to 24 V rail input DC/DC VR modules TYPICAL APPLICATION DIAGRAM 5 V Input BOOT PHASE V CIN ZCD EN Output SW DSBL Gate PWM driver PWM controller THWn Fig. 1 - SiC638 and SiC638A Typical Application Diagram S20-0485-Rev. B, 29-Jun-2020 Document Number: 76582 1 For technical questions, contact: powerictechsupport vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000SW P GND P SW GND P SW GND GL P GND P GND V V DRV IN THWn V IN DSBL V IN SiC638, SiC638A www.vishay.com Vishay Siliconix PINOUT CONFIGURATION 33 31 30 29 28 27 26 25 24 GL 24 25 26 27 28 29 30 31 1 1 PWM PWM 23 V V 23 SWH SWH GL GL ZCD EN 2 2 ZCD EN 22 V V 22 SWH SWH 32 CGND V V 3 C 3 CIN CIN 21 V V 21 GND SWH SWH C 4 4 C GND 20 V V 20 GND SWH SWH 35 BOOT BOOT 5 V 19 5 PGND 19 V SWH SWH P GND N.C. 6 6 N.C. 18 V V 18 SWH SWH 34 VIN PHASE 7 17 V V 17 7 PHASE SWH SWH V IN V 8 16 V V 16 8 V IN SWH SWH IN 9 10 11 12 13 14 15 15 14 13 12 11 10 9 Top view Bottom view Fig. 2 - SiC638 and SiC638A Pin Configuration PIN CONFIGURATION PIN NUMBER NAME FUNCTION 1 PWM PWM input logic The ZCD EN pin enables or disables diode emulation. When ZCD EN is LOW, diode emulation is 2 ZCD EN allowed. When ZCD EN is HIGH, continuous conduction mode is forced 3V Supply voltage for internal logic circuitry CIN 4, 32 C Signal ground GND 5 BOOT High side driver bootstrap voltage 6 N.C. Not connected internally, can be left floating or connected to ground 7 PHASE Return path of high side gate driver 8 to 11, 34 V Power stage input voltage. Drain of high side MOSFET IN 12 to 15, 28, 35 P Power ground GND 16 to 26 SW Phase node of the power stage 27, 33 GL Low side MOSFET gate signal 29 V Supply voltage for internal gate driver DRV 30 THWn Thermal warning open drain output 31 DSBL Disable pin. Active low ORDERING INFORMATION PART NUMBER PACKAGE MARKING CODE OPTION SiC638CD-T1-GE3 PowerPAK MLP55-31L SiC638 5 V PWM optimized SiC638ACD-T1-GE3 PowerPAK MLP55-31L SiC638A 3.3 V PWM optimized SiC638DB Reference board S20-0485-Rev. B, 29-Jun-2020 Document Number: 76582 2 For technical questions, contact: powerictechsupport vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000 P SW GND P SW GND P GND SW P GL GND P GND V V IN DRV V THWn IN V DSBL IN