3.3 mm SiSF00DN www.vishay.com Vishay Siliconix Common Drain Dual N-Channel 30 V (S1-S2) MOSFET FEATURES PowerPAK 1212-8SCD TrenchFET Gen IV power MOSFET S 1 S 1 8 Very low source-to-source on resistance S 7 2 S 2 Integrated common-drain n-channel MOSFETs 6 S 1 5 in a compact and thermally enhanced package S 2 100 % R and UIS tested g Optimizes circuit layout for bi-directional current flow 1 Material categorization: for definitions of compliance 2 G 1 please see www.vishay.com/doc 99912 3 D 1 4 D 2 G 2 APPLICATIONS S 1 Top View Bottom View Battery management G Load switching 1 PRODUCT SUMMARY N-Channel 1 MOSFET V (V) 30 S1S2 R max. ( ) at V = 10 V 0.005 S1S2(on) GS N-Channel 2 MOSFET R max. ( ) at V = 4.5 V 0.007 S1S2(on) GS G 2 h Q typ. (nC) 16.1 g a, g I (A) 60 S1S2 S 2 Configuration Common drain ORDERING INFORMATION Package PowerPAK 1212-8SCD Lead (Pb)-free and halogen-free SiSF00DN-T1-GE3 ABSOLUTE MAXIMUM RATINGS (T = 25 C, unless otherwise noted) A PARAMETER SYMBOL LIMIT UNIT Drain-source voltage V 30 S1S2 V Gate-source voltage V +20 / -16 GS a T = 25 C 60 C a T = 70 C 60 C Continuous drain current (T = 150 C) I J S1S2 b, c T = 25 C 25.5 A A b, c T = 70 C 20.4 A Pulsed drain current (t = 100 s) I 120 S1S2M T = 25 C 69.4 C T = 70 C 44.4 C Maximum power dissipation P W D b, c T = 25 C 5.2 A b, c T = 70 C 3.3 A Operating junction and storage temperature range T , T -55 to +150 J stg C c Soldering recommendations (peak temperature) 260 THERMAL RESISTANCE RATINGS PARAMETER SYMBOL TYPICAL MAXIMUM UNIT b Maximum junction-to-ambient t 10 s R 19 24 thJA C/W Maximum junction-to-case (drain) Steady state R 1.4 1.8 thJC Notes a. Package limited b. Surface mounted on 1 x 1 FR4 board c. t = 10 s d. See solder profile (www.vishay.com/doc 73257). The PowerPAK 1212-8SCD is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure adequate bottom side solder interconnection e. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components f. Maximum under steady state conditions is 63 C/W g. T = 25 C C h. Single MOSFET S20-0868-Rev. B, 09-Nov-2020 Document Number: 75573 1 For technical questions, contact: pmostechsupport vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000 1 3.3 mm SiSF00DN www.vishay.com Vishay Siliconix SPECIFICATIONS (T = 25 C, unless otherwise noted) J PARAMETER SYMBOL TEST CONDITIONS MIN.TYP.MAX.UNIT Static Drain-source breakdown voltage V V = 0 V, I = 250 A 30 - - DS GS D V Gate-source threshold voltage V V = V , I = 250 A 1 - 2.1 GS(th) S1S2 GS D Gate-source leakage I V = 0 V, V = +20 / -16 V - - 100 nA GSS S1S2 GS V = 30 V, V = 0 V - - 1 S1S2 GS Zero gate voltage drain current I A DSS V = 30 V, V = 0 V, T = 70 C - - 15 S1S2 GS J a On-state drain current I V 10 V, V = 10 V 20 - - A S1S2(on) S1S2 GS V = 10 V, I = 10 A - 0.0042 0.0050 GS S1S2 a Drain-source on-state resistance R S1S2(on) V = 4.5 V, I = 5 A - 0.0056 0.0070 GS S1S2 a Forward transconductance g V = 15 V, I = 20 A - 130 - S fs S1S2 S1S2 b, c Dynamic Input capacitance C - 2700 - iss Output capacitance C V = 15 V, V = 0 V, f = 1 MHz - 865 - pF oss DS GS Reverse transfer capacitance C -51 - rss V = 15 V, V = 10 V, I =10 A -35 53 DS GS D Total gate charge Q g - 16.1 24.2 nC Gate-source charge Q V = 15 V, V = 4.5 V, I = 10 A -7 - DS GS D gs Gate-drain charge Q -2.5 - gd Gate resistance R f = 1 MHz 0.3 1.5 3 g Turn-on delay time t -10 20 d(on) Rise time t -32 65 V = 15 V, R = 1 , I 10 A, r DD L S1S2 V = 10 V, R = 1 GEN g Turn-off delay time t -22 45 d(off) Fall time t -10 20 f ns Turn-on delay time t -21 45 d(on) Rise time t - 60 120 V = 15 V, R = 1 , I 10 A, r DD L D V = 4.5 V, R = 1 GEN g Turn-off delay time t -25 50 d(off) Fall time t -15 30 f c Drain-Source Body Diode Characteristics T = 25 C Continuous source-drain diode current I -- 60 S1S2 C A Pulse diode forward current I - - 120 S1S2M Body diode reverse recovery time t -42 85 ns rr Body diode reverse recovery charge Q -42 85 nC rr I = 10 A, di/dt = 100 A/s, F T = 25 C Reverse recovery fall time t J -23 - a ns Reverse recovery rise time t -19 - b Notes a. Pulse test pulse width 300 s, duty cycle 2 % b. Guaranteed by design, not subject to production testing c. On single MOSFET Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. S20-0868-Rev. B, 09-Nov-2020 Document Number: 75573 2 For technical questions, contact: pmostechsupport vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000