W25Q01JV 3V 1G-BIT (DUAL DIE) SERIAL FLASH MEMORY WITH DUAL/QUAD SPI Publication Release Date: November 13, 2019 -Revision B1 W25Q01JV Table of Contents 1. GENERAL DESCRIPTIONS ........................................................................................................ 5 2. FEATURES ................................................................................................................................. 5 3. PACKAGE TYPES AND PIN CONFIGURATIONS ...................................................................... 7 3.1 Pad Configuration WSON 8x6-mm .................................................................................. 7 3.2 Pad Description WSON 8x6-mm ..................................................................................... 7 3.3 Pin Configuration SOIC 300-mil ....................................................................................... 8 3.4 Pin Description SOIC 300-mil .......................................................................................... 8 3.5 Ball Configuration TFBGA 8x6-mm (5x5 or 6x4 Ball Array) ............................................... 9 3.6 Ball Description TFBGA 8x6-mm ..................................................................................... 9 4. PIN DESCRIPTIONS ................................................................................................................. 10 4.1 Chip Select (/CS) ........................................................................................................... 10 4.2 Serial Data Input, Output and IOs (DI, DO and IO0, IO12, IO3) ..................................... 10 4.3 Write Protect (/WP)........................................................................................................ 10 4.4 HOLD (/HOLD) .............................................................................................................. 10 4.5 Serial Clock (CLK) ......................................................................................................... 10 (1) 4.6 Reset (/RESET) .......................................................................................................... 10 5. BLOCK DIAGRAM .................................................................................................................... 12 6. FUNCTIONAL DESCRIPTIONS ................................................................................................ 13 6.1 SPI Operations .............................................................................................................. 13 6.1.1 Standard SPI Instructions ..................................................................................................... 13 6.1.2 Dual SPI Instructions ............................................................................................................ 13 6.1.3 Quad SPI Instructions ........................................................................................................... 13 6.1.4 3-Byte / 4-Byte Address Modes ............................................................................................ 14 6.1.5 Software Reset & Hardware /RESET pin ............................................................................. 14 6.2 Write Protection ............................................................................................................. 15 7. STATUS AND CONFIGURATION REGISTERS ........................................................................ 17 7.1.1 Erase/Write In Progress (BUSY) Status Only ................................................................ 17 7.1.2 Write Enable Latch (WEL) Status Only ......................................................................... 18 7.1.3 Block Protect Bits (BP3, BP2, BP1, BP0) Volatile/Non-Volatile Writable ...................... 18 7.1.4 Top/Bottom Block Protect (TB) Volatile/Non-Volatile Writable ...................................... 18 7.1.5 Complement Protect (CMP) Volatile/Non-Volatile Writable ........................................... 18 7.1.6 Status Register Protect (SRP, SRL) Volatile/Non-Volatile Writable .............................. 19 7.1.7 Erase/Program Suspend Status (SUS) Status Only ...................................................... 20 7.1.8 Security Register Lock Bits (LB3, LB2, LB1) Volatile/Non-Volatile OTP Writable ......... 20 7.1.9 Quad Enable (QE) Volatile/Non-Volatile Writable .......................................................... 20 - 1 -