W25Q16JLSNIG Winbond

W25Q16JL 2.5V 16M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI Publication Release Date: January 26, 2018 - 1 - -Revision D W25Q16JL Table of Contents 1. GENERAL DESCRIPTION ............................................................................................................... 5 2. FEATURES ....................................................................................................................................... 5 3. PACKAGE TYPES ............................................................................................................................ 6 3.1 Pin Configuration SOIC 150 / 208-mil, VSOP 150-MIL ........................................................ 6 3.2 PAD Configuration WSON 6x5-mm & USON 2x3-mm ........................................................ 6 3.3 Pin Description SOIC 150/208-mil, VSOP 150-mil, WSON 6x5-mm, USON 2x3-mm ......... 6 3.4 Pin Descriptions .................................................................................................................... 7 3.4.1 Chip Select (/CS) .................................................................................................................... 7 3.4.2 Serial Data Input, Output and IOs (DI, DO and IO0, IO1, IO2, IO3) ....................................... 7 3.4.3 Write Protect (/WP) ................................................................................................................ 7 3.4.4 HOLD (/HOLD) ....................................................................................................................... 7 3.4.5 Serial Clock (CLK) .................................................................................................................. 7 3.5 Reset (/RESET) .................................................................................................................... 7 4. BLOCK DIAGRAM ............................................................................................................................ 8 5. FUNCTIONAL DESCRIPTION ......................................................................................................... 9 5.1 SPI OPERATIONS ............................................................................................................... 9 5.1.1 Standard SPI Instructions ....................................................................................................... 9 5.1.2 Dual SPI Instructions .............................................................................................................. 9 5.1.3 Quad SPI Instructions ............................................................................................................. 9 5.1.4 Hold Function ......................................................................................................................... 9 5.1.5 Software Reset & Hardware /RESET pin .............................................................................. 10 5.2 WRITE PROTECTION ....................................................................................................... 11 5.2.1 Write Protect Features ......................................................................................................... 11 6. CONTROL AND STATUS REGISTERS ......................................................................................... 12 6.1 STATUS REGISTER .......................................................................................................... 12 6.1.1 BUSY .................................................................................................................................... 12 6.1.2 Write Enable Latch (WEL) .................................................................................................... 12 6.1.3 Block Protect Bits (BP2, BP1, BP0) ...................................................................................... 12 6.1.4 Top/Bottom Block Protect (TB) ............................................................................................. 12 6.1.5 Sector/Block Protect (SEC) .................................................................................................. 12 6.1.6 Complement Protect (CMP) .................................................................................................. 12 6.1.7 Status Register Protect (SRP, SRL) ..................................................................................... 13 6.1.8 Erase/Program Suspend Status (SUS) ................................................................................ 13 6.1.9 Security Register Lock Bits (LB3, LB2, LB1) ........................................................................ 13 6.1.10 Quad Enable (QE) .............................................................................................................. 14 6.1.11 Write Protect Selection (WPS) Volatile/Non-Volatile Writable ..................................... 15 - 2 -