W25Q64FV 3V 64M-BIT SERIAL FLASH MEMORY WITH DUAL/QUAD SPI & QPI Publication Release Date: June 14, 2016 - 1 Revision Q W25Q64FV Table of Contents 1. GENERAL DESCRIPTION ............................................................................................................... 5 2. FEATURES ....................................................................................................................................... 5 3. PACKAGE TYPES AND PIN CONFIGURATIONS ........................................................................... 6 3.1 Pin Configuration SOIC / VSOP 208-mil .............................................................................. 6 3.2 Pad Configuration WSON 6x5-mm / 8X6-mm, XSON 4x4-mm ........................................... 6 3.3 Pin Configuration PDIP 300-mil ............................................................................................ 7 3.4 Pin Description SOIC/VSOP 208-mil, WSON 6x5/8x6-mm, XSON 4x4-mm and PDIP 300- mil 7 3.5 Pin Configuration SOIC 300-mil ........................................................................................... 8 3.6 Pin Description SOIC 300-mil ............................................................................................... 8 3.7 Ball Configuration TFBGA 8x6-mm (5x5 or 6x4 Ball Array) ................................................. 9 3.8 Ball Description TFBGA 8x6-mm ......................................................................................... 9 3.9 Ball Configuration WLCSP ................................................................................................. 10 3.10 Ball Description WLCSP ..................................................................................................... 10 4. PIN DESCRIPTIONS ...................................................................................................................... 11 4.1 Chip Select (/CS) ................................................................................................................ 11 4.2 Serial Data Input, Output and IOs (DI, DO and IO0, IO1, IO2, IO3) ................................... 11 4.3 Write Protect (/WP) ............................................................................................................ 11 4.4 HOLD (/HOLD) ................................................................................................................... 11 4.5 Serial Clock (CLK) .............................................................................................................. 11 5. BLOCK DIAGRAM .......................................................................................................................... 12 6. FUNCTIONAL DESCRIPTIONS ..................................................................................................... 13 6.1 SPI/QPI OPERATIONS ...................................................................................................... 13 6.1.1 Standard SPI Instructions ..................................................................................................... 13 6.1.2 Dual SPI Instructions ............................................................................................................ 13 6.1.3 Quad SPI Instructions ........................................................................................................... 14 6.1.4 QPI Instructions .................................................................................................................... 14 6.1.5 Hold Function ....................................................................................................................... 14 6.2 WRITE PROTECTION ....................................................................................................... 15 6.2.1 Write Protect Features ......................................................................................................... 15 7. STATUS REGISTERS AND INSTRUCTIONS ............................................................................... 16 7.1 STATUS REGISTERS ........................................................................................................ 16 7.1.1 BUSY .................................................................................................................................... 16 7.1.2 Write Enable Latch (WEL) .................................................................................................... 16 7.1.3 Block Protect Bits (BP2, BP1, BP0) ...................................................................................... 16 7.1.4 Top/Bottom Block Protect (TB) ............................................................................................. 16 7.1.5 Sector/Block Protect (SEC) .................................................................................................. 16 - 2 -