W967D6HB 128Mb Async./Page,Syn./Burst CellularRAM 1. GENERAL DESCRIPTION Winbond CellularRAM products are high-speed, CMOS pseudo-static random access memories developed for low-power, portable applications. The device has a DRAM core organized. These devices include an industry- standard burst mode Flash interface that dramatically increases read/write bandwidth compared with other low- power SRAM or Pseudo SRAM offerings. To operate seamlessly on a burst Flash bus, CellularRAM products incorporate a transparent self refresh mechanism. The hidden refresh requires no additional support from the system memory controller and has no significant impact on device READ/WRITE performance. Two user-accessible control registers define device operation. The Bus Configuration Register (BCR) defines how the CellularRAM device interacts with the system memory bus and is nearly identical to its counterpart on burst mode Flash devices. The Refresh Configuration Register (RCR) is used to control how refresh is performed on the DRAM array. These registers are automatically loaded with default settings during power-up and can be updated anytime during normal operation. Special attention has been focused on standby current consumption during self refresh. CellularRAM products include three mechanisms to minimize standby current. Partial array refresh (PAR) enables the system to limit refresh to only that part of the DRAM array that contains essential data. Temperature compensated refresh (TCR) uses an on-chip sensor to adjust the refresh rate to match the device temperaturethe refresh rate decreases at lower temperatures to minimize current consumption during standby. Deep power-down (DPD) enables the system to halt the refresh operation altogether when no vital information is stored in the device. The system configurable refresh mechanisms are accessed through the RCR. This CellularRAM device is compliant with the industry-standard CellularRAM 1.5 generation feature set established by the CellularRAM Workgroup. It includes support for both variable and fixed latency, with 3 output-device drive- strength settings, additional wrap options, and a device ID register (DIDR). 2. FEATURES Supports asynchronous, page, and burst operations Low-power features VCC, VCCQ Voltages: On-chip temperature compensated refresh (TCR) 1.7V1.95V VCC Partial array refresh (PAR) 1.7V1.95V VCCQ Deep power-down (DPD) mode Random access time: 70ns Package: 54 Ball VFBGA Burst mode READ and WRITE access: Active current (ICC1) <35mA at 85C 4, 8, 16, or 32 words, or continuous burst Standby current 250A (max) at 85C Burst wrap or sequential Deep power-down: Typical 10A Max clock rate: 133 MHz (tCLK = 7.5ns) Operating temperature range : -40C ~ 85C Page mode READ access: Sixteen-word page size Interpage READ access: 70ns Intrapage READ access: 20ns Publication Release Date : May 29, 2013 - 1 - Revision : A01-003 W967D6HB 128Mb Async./Page,Syn./Burst CellularRAM 3. ORDERING INFORMATION Part Number VDD/VDDQ I/O Width Type Others W967D6HBGX7I 1.8/1.8 x16 PKG CRAM Non-Mux,133MHz, -40C~85C Publication Release Date : May 29, 2013 - 2 - Revision : A01-003