W988D6FB / W988D2FB 256Mb Mobile LPSDR Table of Contents- 1. GENERAL DESCRIPTION ......................................................................................................... 4 2. FEATURES ................................................................................................................................. 4 3. ORDER INFORMATION ............................................................................................................. 4 4. BALL CONFIGURATION ............................................................................................................ 5 4.1 Ball Assignment: LPSDR x16 ......................................................................................... 5 4.2 Ball Assignment: LPSDR x32 ......................................................................................... 6 5. BALL DESCRIPTION .................................................................................................................. 7 5.1 Signal Description ........................................................................................................... 7 5.2 Addressing Table ............................................................................................................ 8 6. BLOCK DIAGRAM ...................................................................................................................... 9 7. FUNCTIONAL DESCRIPTION.................................................................................................. 10 7.1 Command Function ...................................................................................................... 10 7.1.1 Table 1. Truth Table (Note (1) and (2)) ................................................................... 10 7.1.2 Functional Truth Table (See Note 1) ...................................................................... 11 7.1.3 Functional Truth Table for CKE .............................................................................. 14 7.1.4 Bank Activate Command ........................................................................................ 15 7.1.5 Bank Precharge Command .................................................................................... 15 7.1.6 Precharge All Command ........................................................................................ 15 7.1.7 Write Command ...................................................................................................... 15 7.1.8 Write with Auto Precharge Command .................................................................... 15 7.1.9 Read Command ..................................................................................................... 15 7.1.10 Read with Auto Precharge Command .................................................................... 15 7.1.11 Extended Mode Register Set Command ................................................................ 16 7.1.12 Mode Register Set Command ................................................................................ 16 7.1.13 No-Operation Command ........................................................................................ 16 7.1.14 Burst Stop Command ............................................................................................. 16 7.1.15 Device Deselect Command .................................................................................... 16 7.1.16 Auto Refresh Command ......................................................................................... 16 7.1.17 Self Refresh Entry Command ................................................................................. 16 7.1.18 Self Refresh Exit Command ................................................................................... 17 7.1.19 Clock Suspend Mode Entry/Power Down Mode Entry Command .......................... 17 7.1.20 Clock Suspend Mode Exit/Power Down Mode Exit Command ............................... 17 7.1.21 Data Write/Output Enable, Data Mask/Output Disable Command .......................... 17 8. OPERATION ............................................................................................................................. 17 8.1 Read Operation ............................................................................................................. 17 8.2 Write Operation ............................................................................................................. 18 8.3 Precharge ..................................................................................................................... 18 8.3.1 Auto Precharge ....................................................................................................... 18 8.3.2 READ with auto precharge interrupted by a READ (with or without auto precharge) 19 Publication Release Date: Sep. 22, 2014 Revision: A01-006 - 1 - W988D6FB / W988D2FB 8.3.3 READ with auto precharge interrupted by a WRITE (with or without auto precharge) 19 8.3.4 WRITE with auto precharge interrupted by a READ (with or without auto precharge) 20 8.3.5 WRITE with auto precharge interrupted by a WRITE (with or without auto precharge) 20 8.4 Burst Termination.......................................................................................................... 21 8.5 Mode Register Operation .............................................................................................. 22 8.5.1 Burst Length field (A2~A0) ..................................................................................... 22 8.5.2 Addressing Mode Select (A3) ................................................................................. 22 8.5.3 Addressing Sequence for Sequential Mode ........................................................... 22 8.5.4 Addressing Sequence for Interleave Mode ............................................................. 23 8.5.5 Addressing Sequence Example (Burst Length = 8 and Input Address is 13) ......... 23 8.5.6 Read Cycle CAS Latency = 3 ................................................................................. 23 8.5.7 CAS Latency field (A6~A4) ..................................................................................... 24 8.5.8 Mode Register Definition ........................................................................................ 24 8.6 Extended Mode Register Description ........................................................................... 25 8.7 Simplified State Diagram .............................................................................................. 26 9. ELECTRICAL CHARACTERISTICS ......................................................................................... 27 9.1 Absolute Maximum Ratings .......................................................................................... 27 9.2 Operating Conditions .................................................................................................... 27 9.3 Capacitance .................................................................................................................. 27 9.4 DC Characteristics ........................................................................................................ 28 9.5 Automatic Temperature Compensated Self Refresh Current Feature ......................... 28 9.6 AC Characteristics and Operating Condition ................................................................ 29 9.6.1 AC Characteristics .................................................................................................. 29 9.6.2 AC Test Condition .................................................................................................. 30 9.6.3 AC Latency Characteristics .................................................................................... 31 10. CONTROL TIMING WAVEFORMS .......................................................................................... 32 10.1 Command Input Timing ................................................................................................ 32 10.2 Read Timing .................................................................................................................. 33 10.3 Control Timing of Input Data (x16)................................................................................ 34 10.4 Control Timing of Output Data (x16) ............................................................................. 35 10.5 Control Timing of Input Data (x32)................................................................................ 36 10.6 Control Timing of Output Data (x32) ............................................................................. 37 10.7 Mode Register Set (MRS) Cycle ................................................................................... 38 10.8 Extended Mode register Set (EMRS) Cycle ................................................................. 39 11. OPERATING TIMING EXAMPLE ............................................................................................. 40 11.1 Interleaved Bank Read (Burst Length = 4, CAS Latency = 3) ...................................... 40 11.2 Interleaved Bank Read (Burst Length = 4, CAS Latency = 3, Auto-precharge) ........... 41 11.3 Interleaved Bank Read (Burst Length = 8, CAS Latency = 3) ...................................... 42 11.4 Interleaved Bank Read (Burst Length = 8, CAS Latency = 3, Auto-precharge) ........... 43 11.5 Interleaved Bank Write (Burst Length = 8) ................................................................... 44 11.6 Interleaved Bank Write (Burst Length = 8, Auto-precharge) ........................................ 45 11.7 Page Mode Read (Burst Length = 4, CAS Latency = 3) .............................................. 46 Publication Release Date: Sep. 22, 2014 Revision: A01-006 - 2 -
