LogiCORE IP LTE MIMO Encoder v4.0 PB017 (v4.0) November 18, 2015 Product Brief LogiCORE IP Facts Table Introduction Core Specifics The Xilinx LogiCORE IP 3GPP LTE MIMO UltraScale+ Families Encoder core implements multiple-input, Supported UltraScale Architecture (1) Device Family Zynq-7000 All Programmble SoC multiple-output (MIMO) encoding for LTE 7 Series eNodeB applications as defined in the 3GPP TS Supported User 36.211 v.9.1 specification Ref 1 . It represents AXI4-Stream Interfaces one IP component in the Xilinx broader LTE Provided with Core baseband platform. Design Files Encrypted RTL Example Design Not Provided Additional Documentation Test Bench Not Provided Constraints File Not Provided A product guide is available for this core. Access to this material can be requested by VHDL Behavioral Simulation Verilog and VHDL Structural Model clicking on this registration link: Model and C Model www.xilinx.com/member/lte mimo enc eval/ Supported Not Applicable index.htm S/W Driver (2) Tested Design Flows Features Design Entry Vivado Design Suite For supported simulators, see the AXI4-Stream compliant interfaces Simulation Xilinx Design Tools: Release Notes Guide. Synthesis Not Applicable Implements layer mapping and precoding as defined in the 3GPP TS 36.211 v.9.1 Support specification Ref 1 Provided by Xilinx www.xilinx.com/support Supports both Transmit Diversity and Notes: Spatial Multiplexing encoding schemes 1. For a complete listing of supported devices, see the Vivado IP catalog. Cyclic Delay Diversity option 2. For the supported versions of the tools, see the Xilinx Design Tools: Release Notes Guide. Supports 2 and 4 antennas Maximum theoretical throughput supported for systems with up to 20 MHz bandwidth Parameterizable input/output data precision Copyright 20142015 Xilinx, Inc. Xilinx, the Xilinx logo, Artix, ISE, Kintex, Spartan, Virtex, Vivado, Zynq, and other designated brands included herein are trademarks of Xilinx in the United States and other countries. AMBA, AMBA Designer, ARM, ARM1176JZ-S, CoreSight, Cortex, and PrimeCell are trademarks of ARM in the EU and other countries. All other trademarks are the property of their respective owners. LTE MIMO Encoder v4.0 www.xilinx.com 1 PB017 (v4.0) November 18, 2015 Product SpecificationProduct Brief Applications The 3GPP LTE MIMO Encoder can be used in base station applications implementing eNodeB following the 3GPP TS 36.211 v.9.1 specification Ref 1 . The LTE MIMO Encoder can perform the MIMO encoding functions for downlink transmission. Theory of Operation The LTE MIMO Encoder is to be part of the eNodeB, the downlink baseband processing that encompasses layer mapping and precoding as defined in Ref 1 . Figure 1 shows a high-level view of the functionality included in this product. X-Ref Target - Figure 1 OINTS ONSTELLATION 0 -)-/ %NCODED 1 - 103+ ATA RE Y ,A 0RECODING D I D I Y I Y I -ODULATION MAPPING 2ESOURCE ELEMENT MAPPER MAPPER 3 Figure 1: LTE MIMO Encoder v4.0 Functionality C Model The LTE 3GPP MIMO Encoder core has a bit accurate C model designed for system modeling. The model is bit accurate but not cycle-accurate, so it produces exactly the same output data as the core on a code-word by code-word basis. However, it does not model the core latency or interface signals. The bit accurate behavioral C model of the LTE MIMO Encoder v4.0 and associated product guide are available to customers. The C model is provided as a dynamically linked library for Windows 32-bit and 64-bit Linux platforms. A README.txt file describes the contents of the installed directory structure and any further platform-specific installation instructions. LTE MIMO Encoder v4.0 www.xilinx.com 2 Send Feedback PB017 (v4.0) November 18, 2015