AS6C1008-55STINL Alliance Memory

AS6C1008L 128k x 8 BIT SUPER LOW POWER CMOS SRAM Revision History 128k x 8 BIT AS6C1008L Revision Details Date Preliminary datasheet Rev 1.a Oct 2007 Rev 2.a Delete -35ns speed grade information Apr 2016 Alliance Memory Inc. 511 Taylor Way, San Carlos, CA 94070 TEL: (650) 610-6800 FAX: (650) 620-9211 Alliance Memory Inc. reserves the right to change products or specification without notice Confidential - 1/15 - Rev.2.a April 2016AS6C1008L 128k x 8 BIT SUPER LOW POWER CMOS SRAM FEATURES GENERAL DESCRIPTION The AS6C1008 L is a 1,048,576-bit low power Fast access time : 55ns CMOS static random access memory organized as Low power consumption: 131,072 words by 8 bits. It is fabricated using very Operating current : 10mA (TYP.) high performance, high reliability CMOS technology. Standby current : 1A (TYP.) Its standby current is stable within the range of Single 2.7V ~ 5.5V power supply operating temperature. All outputs TTL compatible Fully static operation The AS6C1008 L is well designed for very low power Tri-state output system applications, and particularly well suited for Data retention voltage : 1.5V (MIN.) battery back-up nonvolatile memory application. Lead freeandgreenpackageavailable Package : 32-pin 450 mil SOP The AS6C1008-55 operates from a single power 32-pin 600 mil P-DIP supply of 2.7V ~ 5.5V and all inputs and outputs are 32-pin 8mm x 20mm TSOP-I fully TTL compatible 32-pin 8mm x 13.4mm STSOP 36-ball 6mm x 8mm TFBGA PRODUCT FAMILY Product Family Operating Temperature Vcc Range Speed AS6C1008 L -40 ~ 85 2.7 ~ 5.5V 55ns FUNCTIONAL BLOCK DIAGRAM PIN DESCRIPTION SYMBOL DESCRIPTION A0 - A16 Address Inputs Vcc Vss DQ0 DQ7 Data Inputs/Outputs CE , CE2 Chip Enable Inputs 128Kx8 A0-A16 DECODER MEMORY ARRAY WE Write Enable Input OE Output Enable Input VCC Power Supply VSS Ground NC No Connection I/O DATA DQ0-DQ7 COLUMN I/O CIRCUIT CE CE2 CONTROL CIRCUIT WE OE Confidential - 2/15 - Rev.2.a April 2016