AS6C1016-55ZIN Alliance Memory

AS6C1016 64K X 16 BIT LOW POWER CMOS SRAM REVISION HISTORY Revision Description Issue Date Rev. 1.0 Initial Issue Nov.19.2008 Rev. 1.1 Revised FEATURES & ORDERING INFORMATION May.6.2010 Lead free and green package available to Green package available Added packing type in ORDERING INFORMATION Deleted TSOLDER in ABSOLUTE MAXIMUM RATINGS Revised PACKAGE OUTLINE DIMENSION in page 11 Revised V to 1.5V DR Rev. 1.2 ORDERING INFORMATION Revised in page 12 Aug.30.2010 Rev. 1.3 Oct.4.2010 Revised typo in PRODUCT FAMILY page 1 Rev. 1.4 Deleted E Grade Aug.9.2011 Rev. 1.5 Revised typo page 0 ABSOLUTE MAXIMUM RATINGS Sep 29 2015 Revised typo Page 3 - ABSOLUTE MAXIMUM RATINGS Revised Page 12 - Package option from T(TSOPII) to Z (TSOP II) Alliance Memory, Inc. Rev. 1.5 0 AS6C1016 64K X 16 BIT LOW POWER CMOS SRAM GENERAL DESCRIPTION FEATURES The AS6C1016 is a 1,048,576-bit low power CMOS Fast access time : 55ns static random access memory organized as 65,536 Low power consumption: words by 16 bits. It is fabricated using very high Operating current : 20mA (TYP.) performance, high reliability CMOS technology. Its Standby current : 2 A (TYP.) standby current is stable within the range of Single 2.7V ~ 5.5V power supply operating temperature. All outputs TTL compatible Fully static operation The AS6C1016 is well designed for low power Tri-state output application, and particularly well suited for battery Data byte control : LB (DQ0 ~ DQ7) back-up nonvolatile memory application. UB (DQ8 ~ DQ15) Data retention voltage : 1.5V (MIN.) The AS6C1016 operates from a single power Green package available Package : 44-pin 400 mil TSOP-II supply of 2.7V ~ 5.5V and all inputs and outputs are fully TTL compatible 48-ball 6mm x 8mm TFBGA PRODUCT FAMILY Product Operating Power Dissipation Vcc Range Speed Family Temperature Standby(ISB1,TYP.) Operating(Icc,TYP.) AS6C1016(I) -40 ~ 85 2.7 ~ 5.5V 55/70ns 2A 20/18mA FUNCTIONAL BLOCK DIAGRAM PIN DESCRIPTION SYMBOL DESCRIPTION Vcc A0 - A15 Address Inputs Vss DQ0 DQ15 Data Inputs/Outputs CE Chip Enable Input 64Kx16 A0-A15 DECODER MEMORY ARRAY WE Write Enable Input OE Output Enable Input LB Lower Byte Control UB Upper Byte Control VCC Power Supply DQ0-DQ7 VSS Ground Lower Byte I/O DATA COLUMN I/O CIRCUIT DQ8-DQ15 Upper Byte CE WE CONTROL OE CIRCUIT LB UB Alliance Memory, Inc. Rev. 1.5 1