AS6C3216 Rev.1.3 2048K X 16 BIT LOW POWER CMOS SRAM REVISION HISTORY Revision Description Issue Date Rev. 1.0 Initial Issue Nov. 06. 2012 Rev. 1.1 Typo error on page 9, revised as 8mmx10mm. Dec.18. 2012 Rev. 1.2 1. Revise ISB1 on page 4 & IDR on page 8 June. 10. 2013 2. Revise VIH(max) & VIL(min) note on page 4 VIH(max) = VCC + 2.0V for pulse width less than 6ns. VIL(min) = VSS - 2.0V for pulse width less than 6ns. Rev 1.3 1. Amended Feature to read ROHS Compliant on page 1 Jan 31, 2014 2. Amended Power Dissipation table Standby(ISB1,TYP.) to read 6A(SL & SLI) on page 1 3. Inserted missing temperature table for ISB1 on page 3 3. Inserted missing temperature table for IDR on page 8 4. Typo error, revised word INTENTIONALLY on page 11 Alliance Memory Inc. reserves the rights to change the specifications and products without notice. Alliance Memory, Inc. 551 Taylor Way, Suite 1, San Carlos, CA 94070, USA Tel: +1 650 610 6800 Fax: +1 650 620 9211 0 AS6C3216 Rev.1.3 2048K X 16 BIT LOW POWER CMOS SRAM FEATURE GENERAL DESCRIPTION Fast access time : 55ns The AS6C3216 is a 33,554,432-bit low power Low power consumption: CMOS static random access memory organized as Operating current : 45mA (TYP.) 2,097,152 words by 16 bits. It is fabricated using Standby current : 6 A (TYP.) SL & SLI-version very high performance, high reliability CMOS technology. Its standby current is stable within the Single 2.7V ~ 3.6V power supply range of operating temperature. All inputs and outputs TTL compatible Fully static operation The AS6C3216 is well designed for low power Tri-state output application, and particularly well suited for battery Data byte control : LB (DQ0 ~ DQ7) back-up nonvolatile memory application. UB (DQ8 ~ DQ15) Data retention voltage : 1.2V (MIN.) The AS6C3216 operates from a single power supply of 2.7V ~ 3.6V and all inputs and outputs are ROHS Compliant Package : 48-ball 8mm x 10mm TFBGA fully TTL compatible PRODUCT FAMILY Power Dissipation Product Operating Vcc Range Speed Family Temperature Standby(ISB1,TYP.) Operating(Icc,TYP.) -40 ~ 85 AS6C3216(I) 2.7 ~ 3.6V 55ns 6A(SL & SLI) 45/mA FUNCTIONAL BLOCK DIAGRAM PIN DESCRIPTION SYMBOL DESCRIPTION A0 A20 Address Inputs Vcc Vss DQ0 DQ15 Data Inputs/Outputs CE , CE2 Chip Enable Input 2048Kx16 A0-A20 DECODER MEMORY ARRAY WE Write Enable Input OE Output Enable Input LB Lower Byte Control UB Upper Byte Control V Power Supply CC V Ground SS DQ0-DQ7 Lower Byte I/O DATA COLUMN I/O CIRCUIT DQ8-DQ15 Upper Byte CE CE2 WE CONTROL OE CIRCUIT LB UB Alliance Memory Inc. reserves the rights to change the specifications and products without notice. Alliance Memory, Inc. 551 Taylor Way, Suite 1, San Carlos, CA 94070, USA Tel: +1 650 610 6800 Fax: +1 650 620 9211 1