AS6C6264 8K X 8 BIT LOW POWER CMOS SRAM REVISION HISTORY Revision Description Issue Date 1.0 Initial issue Feb 2007 2.0 Add-in industrial temperature option for 28-pin 600 July 2017 mil PDIP. Standby current(Isb1) reduced to be 20uA for I-grade and 10uA for C grade Alliance Memory Inc. reserves the rights to change the specifications and products without notice. Alliance Memory, Inc., 511 Taylor Way, San Carlos, CA 94070, USA Tel: +1 650 610 6800 Fax: +1 650 620 9211 0 February 2007 AS6C6264 Updated July 2017 8K X 8 BIT LOW POWER CMOS SRAM FEATURES GENERAL DESCRIPTION The AS6C6264 is a 65,536-bit low power CMOS Access time :55ns static random access memory organized as 8,192 Low power consumption: words by 8 bits. It is fabricated using very high Operation current : performance, high reliability CMOS technology. Its 15mA (TYP.), VCC = 3.0V standby current is stable within the range of Standby current : operating temperature. 1 A (TYP.), V = 3.0V CC Wide range power supply : 2.7 ~ 5.5V The AS6C6264 is well designed for low power Fully Compatible with all Competitors 5V product application, and particularly well suited for battery Fully Compatible with all Competitors 3.3V product back-up nonvolatile memory application. All inputs and outputs TTL compatible Fully static operation The AS6C6264 operates with wide range power Tri-state output supply. Data retention voltage :1.5V (MIN.) All products ROHS Compliant Package : 28-pin 600 mil PDIP 28-pin 330 mil SOP 28-pin 8mm x 13.4mm sTSOP FUNCTIONAL BLOCK DIAGRAM PIN DESCRIPTION SYMBOL DESCRIPTION A0 - A12 Address Inputs V c c V s s DQ0 DQ7 Data Inputs/Outputs CE , CE2 Chip Enable Inputs 8 K x 8 A 0 - A 1 2 D E C O D E R M E M O R Y A R R A Y WE Write Enable Input OE Output Enable Input VCC Power Supply VSS Ground NC No Connection I /O D A T A D Q 0- D Q 7 C O LUM N I /O C I R C U I T C E C E 2 C O N T R O L C I R C U I T W E O E July 2017, v2.0 Alliance Memory Inc Page 1 of 12