AS6C8016-55TIN Revision History List 512K x 16 bit -AS6C8016-55TIN - 48-pin TSOP I PACKAGE Revision Details Date Rev. 1.0 Initial Issue November12.2015 Alliance Memory Inc. 511 Taylor Way, San Carlos, CA 94070 TEL: (650) 610-6800 FAX: (650) 620-9211 Alliance Memory Inc. reserves the right to change products or specification without notice Confidential -1/11- Rev.1.0 Nov 2015AS6C8016-55TIN FEATURES GENERAL DESCRIPTION The AS6C8016-55TIN is a 8,388,608-bit low power n Fast access time : 55ns CMOS static random access memory organized as n Low power consumption: 524,288 words by 16 bits. It is fabricated using very Operating current : 30/20mA (TYP.) high performance, high reliability CMOS Standby current : 1.5A (TYP.) SL-version technology. Its standby current is stable within the n Single 2.7V ~ 3.6V power supply range of operating temperature. n All inputs and outputs TTL compatible n Fully static operation The AS6C8016-55TIN is well designed for low n Tri-state output power application, and particularly well suited for n Data byte control : LB (DQ0 ~ DQ7) battery back-up nonvolatile memory application. UB (DQ8 ~ DQ15) n Data retention voltage : 1.2V(MIN.) The AS6C8016-55TIN operates from a single power supply of 2.7V ~ 3.6V and all inputs and outputs are fully TTL compatible n Package : 48-pin 12mm x 20mm TSOP-I n Green & ROHS Compliant FUNCTIONAL BLOCK DIAGRAM PIN DESCRIPTION SYMBOL DESCRIPTION Vcc A0 - A18 Address Inputs Vss DQ0 DQ15 Data Inputs/Outputs CE , CE2 Chip Enable Input 512Kx16 A0-A18 DECODER MEMORY ARRAY WE Write Enable Input OE Output Enable Input LB Lower Byte Control UB Upper Byte Control VCC Power Supply DQ0-DQ7 VSS Ground Lower Byte I/O DATA COLUMN I/O CIRCUIT DQ8-DQ15 Upper Byte CE CE2 WE CONTROL CIRCUIT OE LB UB PRODUCT FAMILY Product Operating Power Dissipation Vcc Range Speed Family Temperature Standby(ISB1,TYP.) Operating(Icc,TYP.) AS6C8016-55TIN -40 ~ 85 2.7 ~ 3.6V 55ns 1.5A(SL) 30/20mA Confidential -2/11- Rev.1.0 Nov 2015