X-On Electronics has gained recognition as a prominent supplier of PEX8636-AA50RBC G PCI Interface IC across the USA, India, Europe, Australia, and various other global locations. PEX8636-AA50RBC G PCI Interface IC are a product manufactured by Broadcom. We provide cost-effective solutions for PCI Interface IC, ensuring timely deliveries around the world.

PEX8636-AA50RBC G Broadcom

PEX8636-AA50RBC G electronic component of Broadcom
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Part No.PEX8636-AA50RBC G
Manufacturer: Broadcom
Category: PCI Interface IC
Description: PCI Interface IC PCIe Gen2 5.0GT/s 36-Lane 24 Port
Datasheet: PEX8636-AA50RBC G Datasheet (PDF)
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



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720 : USD 176.8706
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We are delighted to provide the PEX8636-AA50RBC G from our PCI Interface IC category, at competitive rates not only in the United States, Australia, and India, but also across Europe and beyond. A long established and extensive electronic component distribution network has enhanced our global reach and dependability, ensuring cost savings through prompt deliveries worldwide. Client satisfaction is at the heart of our business, where every component counts and every customer matters. Our technical service team is ready to assist you. From product selection to after-sales support, we strive to deliver a seamless and satisfying experience. Are you ready to experience the best in electronic component distribution? Contact X-ON Electronics today and discover why X-On are a preferred choice for the PEX8636-AA50RBC G and other electronic components in the PCI Interface IC category and beyond.

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PEX 8636, PCI Express Gen 2 Switch, 36 Lanes, 24 Ports Highlights The ExpressLane PEX 8636 device offers Multi-Host PCI Express switching capability enabling users to connect multiple hosts to their PEX 8636 General Features o 36-lane, 24-port PCIe Gen2 switch respective endpoints via scalable, high bandwidth, non-blocking - Integrated 5.0 GT/s SerDes 2 interconnection to a wide variety of applications including o 35 x 35mm , 1156-ball FCBGA package o Typical Power: 8.8 Watts communications platforms. The PEX 8636 is well suited for fan-out, aggregation, and peer-to-peer applications. PEX 8636 Key Features o Standards Compliant Multi-Host Architecture - PCI Express Base Specification, r2.0 The PEX 8636 employs an enhanced version of PLXs field tested PCIe (backwards compatible w/ PCIe switch architecture, which allows users to configure the device in legacy r1.0a/1.1) - PCI Power Management Spec, r1.2 single-host mode or multi-host mode with up to Eight host ports capable of - Microsoft Vista Compliant 1+1 (one active & one backup) or N+1 (N active & one backup) host failover. - Supports Access Control Services This powerful architectural enhancement enables users to build PCIe based - Dynamic link-width control systems to support high-availability, failover, redundant and clustered - Dynamic SerDes speed control systems. o High Performance performancePAK 9 Read Pacing (bandwidth throttling) High Performance & Low Packet Latency 9 Multicast The PEX 8636 architecture supports packet cut-thru with a maximum 9 Dynamic Buffer/FC Credit Pool latency of 200ns (x1 to x1). This, combined with large packet memory, - Non-blocking switch fabric - Full line rate on all ports flexible common buffer/FC credit pool and non-blocking internal switch - Packet Cut-Thru with 200ns max packet architecture, provides full line rate on all ports for performance-hungry latency (x1 to x1) applications such as servers and switch fabrics. The low latency enables - 2KB Max Payload Size applications to achieve high throughput and performance. In addition to low o Flexible Configuration latency, the device supports a packet payload size of up to 2048 bytes, - Ports configurable as x1, x4, x8, x16 - Registers configurable with strapping enabling the user to achieve even higher throughput. 2 pins, EEPROM, I C, or host software - Lane and polarity reversal Data Integrity - Compatible with PCIe 1.0a PM The PEX 8636 provides end-to-end CRC (ECRC) protection and Poison bit o Multi-Host & Fail-Over Support - Configurable Non-Transparent (NT) port support to enable designs that require end-to-end data integrity. PLX also - Failover with NT port supports data path parity and memory (RAM) error correction circuitry - Up to Eight upstream/Host ports with throughout the internal data paths as packets pass through the switch. 1+1 or N+1 failover to other upstream ports Flexible Configuration o Quality of Service (QoS) - Eight traffic classes per port The PEX 8636s 24 Ports can be - Weighted round-robin source configured to lane widths of x1, port arbitration x4, x8 or x16. Flexible buffer o Reliability, Availability, Serviceability allocation, along with the device s visionPAK flexible packet flow control, 9 Per Port Performance Monitoring Per port payload & header counters maximizes throughput for 9 SerDes Eye Capture applications where more traffic 9 Error Injection and Loopback flows in the downstream, rather - 3 Hot Plug Ports with native HP Signals 2 than upstream, direction. Any port - All ports hot plug capable thru I C can be designated as the upstream (Hot Plug Controller on every port) - ECRC and Poison bit support port, which can be changed - Data Path parity dynamically. Figure 1 shows - Memory (RAM) Error Correction some of the PEX 8636s common - INTA and FATAL ERR signals port configurations in legacy - Advanced Error Reporting - Port Status bits and GPIO available Single-Host mode. Per port error diagnostics - JTAG AC/DC boundary scan PLX Technology, www.plxtech.com Page 1 of 5 10/8/2009, Version 1.0 PEX 8636, PCI Express Gen 2 Switch, 36 Lanes, 24 Ports The PEX 8636 can also be configured in Multi-Host mode Multi-Host & Failover Support where users can choose up to Eight ports as host/upstream In Multi-Host mode, PEX 8636 can be configured with up ports and assign a desired number of downstream ports to to Eight upstream host ports, each with its own dedicated each host. In Multi-Host mode, a virtual switch is created downstream ports. The device can be configured for 1+1 for each host port and its associated downstream ports redundancy or N+1 redundancy. The PEX 8636 allows the inside the device. The traffic between the ports of a virtual hosts to communicate their status to each other via special switch is completely isolated from the traffic in other door-bell registers. In failover mode, if a host fails, the virtual switches. Figure 2 illustrates some configurations host designated for failover will disable the upstream port of the PEX 8636 in Multi-Host mode where each ellipse attached to the failing host and program the downstream represents a virtual switch inside the device. ports of that host to its own domain. Figure 4a shows a two host system in Multi-Host mode with two virtual switches The PEX 8636 inside the device and Figure 4b shows Host 1 disabled also provides after failure and Host 2 having taken over all of Host 1s several ways to end-points. configure its registers. The device can be configured through strapping pins, 2 I C interface, host software, or an optional serial EEPROM. This allows for easy Hot Plug for High Availability debug during Hot plug capability allows users to replace hardware the development phase, performance monitoring during modules and perform maintenance without powering down the operation phase, and driver or software upgrade. the system. The PEX 8636 hot plug capability feature makes it suitable for High Availability (HA) Dual-Host & Failover Support applications. Four downstream ports include a Standard In Single-Host mode, the PEX 8636 supports a Non- Hot Plug Controller. If the PEX 8636 is used in an Transparent (NT) Port, which enables the application where one or more of its downstream ports implementation of dual- connect to PCI Express slots, each ports Hot Plug host systems for Controller can be used to manage the hot-plug event of its redundancy and host associated slot. Every port on the PEX 8636 is equipped failover capability. The with a hot-plug control/status register to support hot-plug NT port allows systems 2 capability through external logic via the I C interface. to isolate host memory domains by presenting SerDes Power and Signal Management the processor subsystem The PEX 8636 supports software control of the SerDes as an endpoint rather outputs to allow optimization of power and signal strength than another memory in a system. The PLX SerDes implementation supports system. Base address four levels of power off, low, typical, and high. The registers are used to SerDes block also supports loop-back modes and translate addresses advanced reporting of error conditions, which enables doorbell registers are used to send interrupts between the efficient management of the entire system. address domains and scratchpad registers (accessible by both CPUs) allow inter-processor communication (see Figure 3). PLX Technology, www.plxtech.com Page 2 of 5 10/8/2009, Version 1.0

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
AV4
AV9
Avago
Avago Technologies US Inc.
AVAGO(Broadcom)
Broadcom Avago
BROADCOM (AVAGO)
Broadcom / Avago
BROADCOM CORPORATION
Broadcom Limited
Broadcom/AVAGO
PLX Technology Avago
PLX Technology / Avago

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