CDM2206-800LR
www.centralsemi.com
N-CHANNEL
LR POWER MOSFET
DESCRIPTION:
6.0 AMP, 800 VOLT
The CENTRAL SEMICONDUCTOR CDM2206-800LR
is an 800 volt N-Channel MOSFET designed for high
voltage, fast switching applications such as Power
Factor Correction (PFC), lighting and power inverters.
This MOSFET combines high voltage capability with
ultra low r , low threshold voltage, and low gate
DS(ON)
charge for optimal efficiency.
MARKING CODE: CDM06-800LR
TO-220 CASE
APPLICATIONS: FEATURES:
Power Factor Correction
High voltage capability (V =800V)
DS
Alternative energy inverters
Low gate charge (Q =2.8nC TYP)
gs
Solid State Lighting (SSL)
Ultra low r (0.8 TYP)
DS(ON)
MAXIMUM RATINGS: (T =25C unless otherwise noted)
C
SYMBOL UNITS
Drain-Source Voltage V 800 V
DS
Gate-Source Voltage V 30 V
GS
Continuous Drain Current (Steady State) I 6.0 A
D
Continuous Drain Current (T=100C) I 4.0 A
C D
Maximum Pulsed Drain Current, tp=10s I 24 A
DM
Continuous Source Current (Body Diode) I 6.0 A
S
Maximum Pulsed Source Current (Body Diode) I 24 A
SM
Single Pulse Avalanche Energy (Note 1) E 250 mJ
AS
Power Dissipation P 110 W
D
Operating and Storage Junction Temperature T , T -55 to +150 C
J stg
Thermal Resistance 1.14 C/W
JC
Thermal Resistance 62.5 C/W
JA
Note 1: L=79mH, I =2.4A, V =100V, R =25, Initial T =25C
AS DD G J
ELECTRICAL CHARACTERISTICS: (T =25C unless otherwise noted)
C
SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
I , I V =30V, V=0 100 nA
GSSF GSSR GS DS
I V =800V, V=0 0.0426 1.0 A
DSS DS GS
BV V =0, I=250A 800 V
DSS GS D
V V =V , I=250A 2.0 3.2 4.0 V
GS(th) GS DS D
V V =0, I=6.0A 0.89 1.4 V
SD GS S
r V =10V, I=3.0A 0.8 0.95
DS(ON) GS D
C V =100V, V =0, f=1.0MHz 3.3 pF
rss DS GS
C V =100V, V =0, f=1.0MHz 474.7 pF
iss DS GS
C V =100V, V =0, f=1.0MHz 23.2 pF
oss DS GS
R1 (14-June 2016)CDM2206-800LR
N-CHANNEL
LR POWER MOSFET
6.0 AMP, 800 VOLT
ELECTRICAL CHARACTERISTICS - Continued: (T =25C unless otherwise noted)
C
SYMBOL TEST CONDITIONS TYP UNITS
Q V =640V, V =10V, I =6.0A (Note 2) 24.3 nC
g(tot) DD GS D
Q V =640V, V =10V, I =6.0A (Note 2) 2.8 nC
gs DD GS D
Q V =640V, V =10V, I =6.0A (Note 2) 14.9 nC
gd DD GS D
t V =400V, V =10V, I =6.0A, R =4.7 (Note 2) 9.3 ns
d(on) DD GS D G
t V =400V, V =10V, I =6.0A, R =4.7 (Note 2) 22.7 ns
r DD GS D G
t V =400V, V =10V, I =6.0A, R =4.7 (Note 2) 42.3 ns
d(off) DD GS D G
t V =400V, V =10V, I =6.0A, R =4.7 (Note 2) 25.6 ns
f DD GS D G
t V =0, I =6.0A, di/dt=100A/s (Note 2) 398.6 ns
rr GS S
Q V =0, I =6.0A, di/dt=100A/s (Note 2) 3.5 C
rr GS S
Note 2: Pulse Width < 300s, Duty Cycle < 2%
TO-220 CASE - MECHANICAL OUTLINE
R2
PIN CONFIGURATION
LEAD CODE:
1) Gate
2) Drain
3) Source
(Tab is common to pin 2)
MARKING CODE: CDM06-800LR
R1 (14-June 2016)
www.centralsemi.com