CMKDM8005 SURFACE MOUNT SILICON www.centralsemi.com DUAL P-CHANNEL DESCRIPTION: ENHANCEMENT-MODE The CENTRAL SEMICONDUCTOR CMKDM8005 MOSFET consists of dual P-Channel enhancement-mode silicon MOSFETs designed for high speed pulsed amplifier and driver applications. These MOSFETs offer very low r and low threshold voltage. DS(ON) MARKING CODE: C85M FEATURES: SOT-363 CASE ESD protection up to 1800V (Human Body Model) 350mW power dissipation APPLICATIONS: Very low r DS(ON) Load switch/Level shifting Low threshold voltage Battery charging Logic level compatible Boost switch Electro-luminescent backlighting Small, SOT-363 surface mount package MAXIMUM RATINGS: (T =25C) SYMBOL UNITS A Drain-Source Voltage V 20 V DS Gate-Source Voltage V 8.0 V GS Continuous Drain Current (Steady State) I 650 mA D Continuous Source Current (Body Diode) I 250 mA S Maximum Pulsed Drain Current I 1.0 A DM Power Dissipation P 350 mW D Operating and Storage Junction Temperature T , T -65 to +150 C J stg Thermal Resistance 357 C/W JA ELECTRICAL CHARACTERISTICS PER TRANSISTOR: (T =25C unless otherwise noted) A SYMBOL TEST CONDITIONS MIN TYP MAX UNITS I , I V =4.5V, V=0 10 A GSSF GSSR GS DS I V =16V, V=0 100 nA DSS DS GS BV V =0, I=250A 20 V DSS GS D V V =V , I=250A 0.5 1.0 V GS(th) DS GS D V V =0, I=250mA 1.1 V SD GS S r V =4.5V, I=350mA 0.25 0.36 DS(ON) GS D r V =2.5V, I=300mA 0.37 0.5 DS(ON) GS D r V =1.8V, I=150mA 0.8 DS(ON) GS D g V =10V, I=200mA 0.2 S FS DS D C V =16V, V =0, f=1.0MHz 25 pF rss DS GS C V =16V, V =0, f=1.0MHz 100 pF iss DS GS C V =16V, V =0, f=1.0MHz 21 pF oss DS GS R3 (3-June 2013)CMKDM8005 SURFACE MOUNT SILICON DUAL P-CHANNEL ENHANCEMENT-MODE MOSFET ELECTRICAL CHARACTERISTICS PER TRANSISTOR - Continued: (T =25C unless otherwise noted) A SYMBOL TEST CONDITIONS TYP MAX UNITS Q V =10V, V =4.5V, I =200mA g(tot) DS GS D 1.2 nC Q V =10V, V =4.5V, I =200mA gs DS GS D 0.24 nC Q V =10V, V =4.5V, I =200mA gd DS GS D 0.36 nC t V =10V, V =4.5V, I =200mA, R =10 38 ns on DD GS D G t V =10V, V =4.5V, I =200mA, R =10 48 ns off DD GS D G SOT-363 CASE - MECHANICAL OUTLINE PIN CONFIGURATION LEAD CODE: 1) Source Q1 2) Gate Q1 3) Drain Q2 4) Source Q2 5) Gate Q2 6) Drain Q1 MARKING CODE: C85M R3 (3-June 2013) www.centralsemi.com