CMLDM7002A CMLDM7002AG* CMLDM7002AJ www.centralsemi.com SURFACE MOUNT SILICON DESCRIPTION: DUAL N-CHANNEL These CENTRAL SEMICONDUCTOR devices are ENHANCEMENT-MODE MOSFETS dual N-Channel enhancement-mode MOSFETs, manufactured by the N-Channel DMOS Process, designed for high speed pulsed amplifier and driver applications. The CMLDM7002A utilizes the USA pinout configuration, while the CMLDM7002AJ utilizes the Japanese pinout configuration. These devices offer low r and low V . DS (ON) DS(ON) MARKING CODES: CMLDM7002A: L02 SOT-563 CASE CMLDM7002AG*: C2G Device is Halogen Free by design * CMLDM7002AJ: 02J MAXIMUM RATINGS: (T =25C) SYMBOL UNITS A Drain-Source Voltage V 60 V DS Drain-Gate Voltage V 60 V DG Gate-Source Voltage V 40 V GS Continuous Drain Current I 280 mA D Continuous Source Current (Body Diode) I 280 mA S Maximum Pulsed Drain Current I 1.5 A DM Maximum Pulsed Source Current I 1.5 A SM Power Dissipation (Note 1) P 350 mW D Power Dissipation (Note 2) P 300 mW D Power Dissipation (Note 3) P 150 mW D Operating and Storage Junction Temperature T , T -65 to +150 C J stg Thermal Resistance 357 C/W JA ELECTRICAL CHARACTERISTICS PER TRANSISTOR: (T =25C unless otherwise noted) A SYMBOL TEST CONDITIONS MIN MAX UNITS I , I V =20V, V=0 100 nA GSSF GSSR GS DS I V =60V, V=0 1.0 A DSS DS GS I V =60V, V =0, T=125C 500 A DSS DS GS J I V =10V, V=10V 500 mA D(ON) GS DS BV V =0, I=10A 60 V DSS GS D V V =V , I=250A 1.0 2.5 V GS(th) DS GS D V V =10V, I=500mA 1.0 V DS(ON) GS D V V =5.0V, I =50mA 0.15 V DS(ON) GS D V V =0, I=400mA 1.2 V SD GS S r V =10V, I=500mA 2.0 DS(ON) GS D r V =10V, I =500mA, T=125C 3.5 DS(ON) GS D J r V =5.0V, I=50mA 3.0 DS(ON) GS D r V =5.0V, I =50mA, T=125C 5.0 DS(ON) GS D J g V =10V, I=200mA 80 mS FS DS D 2 Notes: (1) Ceramic or aluminum core PC Board with copper mounting pad area of 4.0mm 2 (2) FR-4 Epoxy PC Board with copper mounting pad area of 4.0mm 2 (3) FR-4 Epoxy PC Board with copper mounting pad area of 1.4mm R8 (8-June 2015)CMLDM7002A CMLDM7002AG* CMLDM7002AJ SURFACE MOUNT SILICON DUAL N-CHANNEL ENHANCEMENT-MODE MOSFETS ELECTRICAL CHARACTERISTICS PER TRANSISTOR - Continued: (T =25C unless otherwise noted) A SYMBOL TEST CONDITIONS TYP MAX UNITS C V =25V, V =0, f=1.0MHz 5.0 pF rss DS GS C V =25V, V =0, f=1.0MHz 50 pF iss DS GS C V =25V, V =0, f=1.0MHz 25 pF oss DS GS Q V =30V, V =4.5V, I=100mA 0.592 nC g(tot) DS GS D Q V =30V, V =4.5V, I=100mA 0.196 nC gs DS GS D Q V =30V, V =4.5V, I=100mA 0.148 nC gd DS GS D t , t V =30V, V =10V, I=200mA on off DD GS D R =25, R=150 20 ns G L SOT-563 CASE - MECHANICAL OUTLINE PIN CONFIGURATIONS CMLDM7002AJ (Japanese Pinout) CMLDM7002A (USA Pinout) CMLDM7002AG* LEAD CODE: LEAD CODE: 1) Gate Q1 1) Source Q1 2) Source Q1 2) Gate Q1 3) Drain Q2 3) Drain Q2 4) Gate Q2 4) Source Q2 5) Source Q2 5) Gate Q2 6) Drain Q1 6) Drain Q1 MARKING CODES: MARKING CODE: 02J CMLDM7002A: L02 CMLDM7002AG*: C2G Device is Halogen Free by design * R8 (8-June 2015) www.centralsemi.com