CMLDM8120 CMLDM8120G* www.centralsemi.com SURFACE MOUNT SILICON P-CHANNEL DESCRIPTION: ENHANCEMENT-MODE These CENTRAL SEMICONDUCTOR devices MOSFET are enhancement-mode P-Channel MOSFETs, manufactured by the P-Channel DMOS Process, designed for high speed pulsed amplifier and driver applications. This MOSFET offers low r and low DS(on) theshold voltage. MARKING CODES: CMLDM8120: C81 CMLDM8120G*: C8G SOT-563 CASE Device is Halogen Free by design * FEATURES: APPLICATIONS: Low r DS(on) Load/Power Switches Low Threshold Voltage Power Supply Converter Circuits Logic Level Compatible Battery Powered Portable Equipment Small SOT-563 package MAXIMUM RATINGS: (T =25C) SYMBOL UNITS A Drain-Source Voltage V 20 V DS Gate-Source Voltage V 8.0 V GS Continuous Drain Current (Steady State) I 860 mA D Continuous Drain Current, t5.0s I 950 mA D Continuous Source Current (Body Diode) I 360 mA S Maximum Pulsed Drain Current, tp=10s I 4.0 A DM Maximum Pulsed Source Current, tp=10s I 4.0 A SM Power Dissipation (Note 1) P 350 mW D Power Dissipation (Note 2) P 300 mW D Power Dissipation (Note 3) P 150 mW D Operating and Storage Junction Temperature T , T -65 to +150 C J stg Thermal Resistance 357 C/W JA ELECTRICAL CHARACTERISTICS: (T =25C unless otherwise noted) A SYMBOL TEST CONDITIONS MIN TYP MAX UNITS I , I V =8.0V, V=0 1.0 50 nA GSSF GSSR GS DS I V =20V, V=0 5.0 500 nA DSS DS GS BV V =0, I=250A 20 24 V DSS GS D V V =V , I=250A 0.45 0.76 1.0 V GS(th) DS GS D V V =0V, I=360mA 0.9 V SD GS S r V =4.5V, I=0.95A 0.085 0.15 DS(ON) GS D r V =4.5V, I=0.77A 0.085 0.142 DS(ON) GS D r V =2.5V, I=0.67A 0.13 0.20 DS(ON) GS D r V =1.8V, I=0.2A 0.19 0.24 DS(ON) GS D g V =10V, I=0.81A 2.0 S FS DS D C V =16V, V =0, f=1.0MHz 80 pF rss DS GS C V =16V, V =0, f=1.0MHz 200 pF iss DS GS C V =16V, V =0, f=1.0MHz 60 pF oss DS GS 2 Notes: (1) Ceramic or aluminum core PC Board with copper mounting pad area of 4.0mm 2 (2) FR-4 Epoxy PC Board with copper mounting pad area of 4.0mm R6 (8-June 2015) 2 (3) FR-4 Epoxy PC Board with copper mounting pad area of 1.4mmCMLDM8120 CMLDM8120G* SURFACE MOUNT SILICON P-CHANNEL ENHANCEMENT-MODE MOSFET ELECTRICAL CHARACTERISTICS - Continued: (T =25C unless otherwise noted) A SYMBOL TEST CONDITIONS TYP UNITS Q V =10V, V =4.5V, I=1.0A 3.56 nC g(tot) DS GS D Q V =10V, V =4.5V, I=1.0A 0.36 nC gs DS GS D Q V =10V, V =4.5V, I=1.0A 1.52 nC gd DS GS D t V =10V, V =4.5V, I =0.95A, R=6 20 ns on DD GS D G t V =10V, V =4.5V, I =0.95A, R=6 25 ns off DD GS D G SOT-563 CASE - MECHANICAL OUTLINE PIN CONFIGURATION LEAD CODE: 1) Drain 2) Drain 3) Gate 4) Source 5) Drain 6) Drain MARKING CODES: CMLDM8120: C81 CMLDM8120G*: C8G * Device is Halogen Free by design R6 (8-June 2015) www.centralsemi.com