CY7C6431x CY7C6434x CY7C6435x enCoRe V Full Speed USB Controller enCoRe V Full Speed USB Controller Programmable pin configurations Features Up to 36 general purpose I/O (GPIO) depending on package. Powerful Harvard-architecture processor 25 mA sink current on all GPIO M8C processor speeds running up to 24 MHz 60mA total sink current on Even port pins and 60 mA total Low power at high processing speeds sink current on Odd port pins Interrupt controller 120 mA total sink current on all GPIOs 3.0 V to 5.5 V operating voltage without USB Pull-up, High Z, open drain, CMOS drive modes on all GPIO Operating voltage with USB enabled: CMOS drive mode A -5 mA source current on ports 0 and 1 3.15 V to 3.45 V when supply voltage is around 3.3 V and 1 mA on ports 2, 3, and 4 4.35 V to 5.25 V when supply voltage is around 5.0 V 20 mA total source current on all GPIOs Commercial temperature range: 0C to +70C Low dropout voltage regulator for Port 1 pins: Industrial temperature range: 40 C to +85 C Programmable to output 3.0, 2.5, or 1.8 V Flexible on-chip memory Selectable, regulated digital I/O on Port 1 Up to 32 KB flash program storage: Configurable input threshold for Port 1 50,000 erase and write cycles Hot-swappable Capability on Port 1 Flexible protection modes Full-Speed USB (12 Mbps) Up to 2048 bytes SRAM data storage Eight unidirectional endpoints In-system serial programming (ISSP) One bidirectional control endpoint Complete development tools USB 2.0-compliant: TID 40000893 Dedicated 512 bytes buffer Free development tool PSoC Designer No external crystal required Full-featured, in-circuit emulator and programmer Additional system resources Full-speed emulation Configurable communication speeds Complex breakpoint structure 2 I C slave: 128-KB trace memory Selectable to 50 kHz, 100 kHz, or 400 kHz Precision, programmable clocking Implementation requires no clock stretching Crystal-less oscillator with support for an external crystal or resonator Implementation during sleep modes with less than 100 A Internal 5.0% 6, 12, or 24 MHz main oscillator (IMO): Hardware address detection 0.25% accuracy with oscillator lock to USB data, no SPI master and SPI slave: external components required Configurable between 46.9 kHz and 12 MHz Internal low-speed oscillator (ILO) at 32 kHz for watchdog Three 16-bit timers and sleep. The frequency range is 19 to 50 kHz with a 10-bit ADC used to monitor battery voltage or other signals 32-kHz typical value with external components Watchdog and sleep timers Integrated supervisory circuit enCoRe V Block Diagram Port 4 Port 3 Port 2 Port 1 Port 0 Prog. LDO enCoRe V CORE System Bus SRAM 2048 Bytes SROM 8K/16K/32K Flash Sleep and CPU Core (M8C) Interrupt Watchdog Controller 6/12/24 MHz Internal Main Oscillator POR and LVD Full I2C Slave/SPI 3 16-Bit ADC Speed Timers Master-Slave System Resets USB SYSTEM RESOURCES Errata: For information on silicon errata, see Errata on page 35. Details include trigger conditions, devices affected, and proposed workaround. Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 001-12394 Rev. *R Revised November 20, 2013CY7C6431x CY7C6434x CY7C6435x Contents Functional Overview ........................................................3 Electrical Specifications ................................................ 16 The enCoRe V Core ....................................................3 Absolute Maximum Ratings ....................................... 17 Full-Speed USB ...........................................................3 Operating Temperature ............................................. 17 10-bit ADC ...................................................................4 DC Electrical Characteristics ..................................... 18 SPI ...............................................................................4 AC Electrical Characteristics ..................................... 22 I2C Slave .....................................................................5 Package Diagram ............................................................ 29 Additional System Resources .....................................6 Packaging Dimensions .............................................. 29 Getting Started ..................................................................6 Package Handling ..................................................... 31 Application Notes ........................................................6 Thermal Impedances ................................................. 31 Development Kits ........................................................6 Capacitance on Crystal Pins ..................................... 31 Training .......................................................................6 Solder Reflow Peak Temperature .............................31 CYPros Consultants ....................................................6 Ordering Information ...................................................... 32 Solutions Library ..........................................................6 Ordering Code Definitions ......................................... 33 Technical Support .......................................................6 Acronyms ........................................................................34 Development Tools ..........................................................7 Document Conventions ................................................. 34 PSoC Designer Software Subsystems ........................7 Units of Measure ....................................................... 34 Designing with PSoC Designer .......................................8 Numeric Naming ........................................................ 34 Select User Modules ...................................................8 Errata ...............................................................................35 Configure User Modules ..............................................8 CY7C643xx Errata Summary .................................... 35 Organize and Connect ................................................8 Document History Page ................................................. 37 Generate, Verify, and Debug .......................................8 Sales, Solutions, and Legal Information ...................... 40 Pin Configuration .............................................................9 Worldwide Sales and Design Support ....................... 40 16-pin Part pinout ........................................................9 Products ....................................................................40 32-pin Part Pinout ......................................................10 PSoC Solutions ...................................................... 40 48-pin Part Pinout ......................................................11 Cypress Developer Community ................................. 40 Register Reference .........................................................13 Technical Support ..................................................... 40 Register Conventions ....................................................13 Register Mapping Tables ...............................................13 Document Number: 001-12394 Rev. *R Page 2 of 40