CY7C65632, CY7C65634 HX2VL Very Low Power USB 2.0 Hub Controller HX2VL Very Low Power USB 2.0 Hub Controller Features High performance, low-power USB 2.0 Hub, optimized for low 12 MHz +/ 500 ppm external crystal with drive level 600 W (integrated PLL) clock input with optional 27/48 MHz cost designs with minimum Bill-of-material oscillator clock input USB 2.0 hub controller Internal power failure detection for ESD recovery Compliant with USB 2.0 specification, TID 30000060 Downstream port management Up to four downstream ports support Support individual and ganged mode power management Downstream ports are backward compatible with FS, LS Overcurrent detection Single transaction translator (TT) for low cost Two port status indicators per downstream port Very low power consumption Maximum configurability Supports bus-powered and self-powered modes VID and PID are configurable through external EEPROM Auto switching between bus-powered and self-powered Number of ports, removable/non-removable ports are Single MCU with 2K ROM and 64 byte RAM configurable through EEPROM and I/O pin configuration Lowest power consumption I/O pins can configure gang/individual mode power switching, reference clock source and polarity of power Highly integrated solution for reduced BOM cost switch enable pin Internal regulator single power supply 5 V required Configuration options also available through mask ROM Provision of connecting 3.3 V with external regulator Integrated upstream pull-up resistor Available in space saving 48-pin (7 7 mm) TQFP and 28-pin (5 5 mm) QFN packages Integrated pull-down resistors for all downstream ports Integrated upstream/downstream termination resistors Supports 0 C to 70 C temperature range Integrated port status indicator control Block Diagram CY7C6563X I2C / MCU D+ D- SPI RAM ROM 12/27/48 USB 2.0 PHY MHz Serial HS USB Interface OSC-in Control Logic PLL Engine OR 12 MHz USB Upstream Port Crystal 5V i/p (for internal regulator) NC (for external regulator) Transaction Translator 1.8V Regulator Hub Repeater 3.3V 3.3V i/p (with ext. reg. & 28 QFN) NC (with ext. reg. & 48 TQFP) 3.3V o/p (for int. reg.) Routing Logic USB Downstream Port 1 USB Downstream Port 2 USB Downstream Port 3 USB Downstream Port 4 For two port version, USB Downstream ports 3 and 4 are to be No connect from USB 2.0 Port USB 2.0 Port USB 2.0 Port USB 2.0 Port the Chip I/O perspective. PHY Control PHY Control PHY Control PHY Control LED LED LED LED D+ D- D+ D- D+ D- D+ D- Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 001-67568 Rev. *L Revised April 13, 2018 P W R 1 O V R 1 P W R 2 O V R 2 P W R 3 O V R 3 P W R 4 O V R 4 CY7C65632, CY7C65634 More Information Cypress provides a wealth of data at www.cypress.com to help you to select the right HX2VL device for your design, and to help you to quickly and effectively integrate the device into your design. For a comprehensive list of resources, see the knowledge base article