CY7C68013A, CY7C68014A CY7C68015A, CY7C68016A EZ-USB FX2LP USB Microcontroller High-Speed USB Peripheral Controller EZ-USB FX2LP USB Microcontroller High Speed USB Peripheral Controller Two data pointers Features 3.3-V operation with 5-V tolerant inputs USB 2.0 USB IF Hi-Speed certified (TID 40460272) Vectored USB interrupts and GPIF/FIFO interrupts Single-chip integrated USB 2.0 transceiver, smart SIE, and Separate data buffers for the setup and data portions of a enhanced 8051 microprocessor CONTROL transfer 2 Fit-, form-, and function-compatible with the FX2 Integrated I C controller runs at 100 or 400 kHz Pin-compatible0 Four integrated FIFOs Object-code-compatible Integrated glue logic and FIFOs lower system cost Functionally compatible (FX2LP is a superset) Automatic conversion to and from 16-bit buses Ultra-low power: I no more than 85 mA in any mode Master or slave operation CC Ideal for bus- and battery-powered applications Uses external clock or asynchronous strobes Easy interface to ASIC and DSP ICs Software: 8051 code runs from: Available in commercial and industrial temperature grades Internal RAM, which is downloaded through USB (all packages except VFBGA) Internal RAM, which is loaded from EEPROM External memory device (128-pin package) Features (CY7C68013A/14A only) 16 KB of on-chip code/data RAM CY7C68014A: Ideal for battery-powered applications Four programmable BULK, INTERRUPT, and Suspend current: 100 A (typ) ISOCHRONOUS endpoints CY7C68013A: Ideal for nonbattery-powered applications Buffering options: Double, triple, and quad Suspend current: 300 A (typ) Additional programmable (BULK/INTERRUPT) 64-byte Available in five Pb-free packages with up to 40 GPIOs endpoint 128-pin TQFP (40 GPIOs), 100-pin TQFP (40 GPIOs), 56-pin 8-bit or 16-bit external data interface QFN (24 GPIOs), 56-pin SSOP (24 GPIOs), and 56-pin VFBGA (24 GPIOs) Smart media standard ECC generation Features (CY7C68015A/16A only) GPIF (general programmable interface) Enables direct connection to most parallel interfaces CY7C68016A: Ideal for battery-powered applications Programmable waveform descriptors and configuration Suspend current: 100 A (typ) registers to define waveforms CY7C68015A: Ideal for nonbattery-powered applications Supports multiple ready (RDY) inputs and control (CTL) outputs Suspend current: 300 A (typ) Integrated, industry-standard, enhanced 8051 Available in Pb-free 56-pin QFN package (26 GPIOs) 48-MHz, 24-MHz, or 12-MHz CPU operation Two more GPIOs than CY7C68013A/14A enabling additional Four clocks per instruction cycle features in the same footprint Two USARTs For a complete list of related resources, click here. Three counter/timers Expanded interrupt system Errata: For information on silicon errata, see Errata on page 64. Details include trigger conditions, devices affected, and proposed workaround. Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 38-08032 Rev. AA Revised November 9, 2017CY7C68013A, CY7C68014A CY7C68015A, CY7C68016A More Information Cypress provides a wealth of data at www.cypress.com to help you to select the right device for your design, and to help you to quickly and effectively integrate the device into your design. For a comprehensive list of resources, see the application note AN65209 - Getting Started with FX2LP. Overview: USB Portfolio, USB Roadmap EZ-USB FX2LP Development Kit The CY3684 EZ-USB FX2LP Development Kit is a complete USB 2.0 Product Selectors: FX2LP, AT2LP, NX2LP-Flex, SX2 development resource for FX2LP. It provides a platform to Application notes: Cypress offers a large number of USB appli- develop and test custom projects using FX2LP. The cation notes covering a broad range of topics, from basic to development kit contains collateral materials for the firmware, advanced level. Recommended application notes for getting hardware, and software aspects of a design using FX2LP. started with FX2LP are: GPIF Designer AN65209 - Getting Started with FX2LP AN15456 - Guide to Successful EZ-USB FX2LP and FX2LP General Programmable Interface (GPIF) provides an EZ-USB FX1 Hardware Design and Debug independent hardware unit, which creates the data and control AN50963 - EZ-USB FX1/FX2LP Boot Options signals required by an external interface. FX2LP GPIF Designer AN66806 - EZ-USB FX2LP GPIF Design Guide allows users to create and modify GPIF waveform descriptors for EZ-USB FX2/ FX2LP family of chips using a graphical user AN61345 - Implementing an FX2LP- FPGA Interface interface. Extensive discussion of general GPIF discussion and AN57322 - Interfacing SRAM with FX2LP over GPIF programming using GPIF Designer is included in FX2LP AN4053 - Streaming Data through Isochronous/Bulk End- Technical Reference Manual and GPIF Designer User Guide, points on EZ-USB FX2 and EZUSB FX2LP distributed with GPIF Designer. AN66806 - Getting Started with AN63787 - EZ-USB FX2LP GPIF and Slave FIFO Con- EZ-USB FX2LP GPIF can be a good starting point. figuration Examples using 8-bit Asynchronous Interface For complete list of Application notes, click here. Code Examples: USB Hi-Speed Technical Reference Manual (TRM): EZ-USB FX2LP Technical Reference Manual Reference Designs: CY4661 - External USB Hard Disk Drives (HDD) with Finger- print Authentication Security FX2LP DMB-T/H TV Dongle reference design Models: IBIS Document Number: 38-08032 Rev. AA Page 2 of 68