CY7C68053 MoBL-USB FX2LP18 USB Microcontroller Features Integrated, Industry Standard Enhanced 8051 USB 2.0 9 V USB-IF high speed and full speed compliant (TID 48 MHz, 24 MHz, or 12 MHz CPU operation 40000188) Four clocks per instruction cycle Single-chip integrated USB 2.0 transceiver, smart SIE, and Three counter/timers enhanced 8051 microprocessor Expanded interrupt system Two data pointers Ideal for mobile applications (cell phone, smart phones, PDAs, MP3 players) 1.8 V Core Operation Ultra low power 1.8 V to 3.3 V I/O Operation Suspend current: 20 A (typical) Vectored USB Interrupts and GPIF/FIFO Interrupts Software: 8051 Code runs from: Internal RAM, which is loaded from EEPROM Separate Data Buffers for Setup and Data Portions of a CONTROL Transfer 16 kBytes of on-chip code/data RAM 2 Integrated I C Controller, runs at 100 or 400 kHz Four programmable BULK/INTERRUPT/ISOCHRONOUS endpoints Four Integrated FIFOs Buffering options: double, triple, and quad Integrated glue logic and FIFOs lower system cost Automatic conversion to and from 16-bit buses Additional Programmable (BULK/INTERRUPT) 64-Byte Endpoint Master or slave operation Uses external clock or asynchronous strobes 8 or 16-Bit External Data Interface Easy interface to ASIC and DSP ICs Smart Media Standard ECC Generation Available in Industrial Temperature Grade GPIF (General Programmable Interface) Available in one Pb-free Package with up to 24 GPIOs Allows direct connection to most parallel interface 56-pin VFBGA (24 GPIOs) Programmable waveform descriptors and configuration registers to define waveforms Supports multiple Ready and Control outputs Logic Block Diagram High-performance microprocessor 24 MHz using standard tools Ext. XTAL with lower-power options MoBL-USB FX2LP18 2 I C /0.5 8051 Core x20 Master VCC /1.0 12/24/48 MHz, PLL /2.0 Four Clocks/Cycle Abundant IO Additional IOs (24) 1.5K Connected for Full-Speed D+ General GPIF USB Programmable I/F CY 16 KB RDY (2) 2.0 CTL (3) To Baseband Processors/ Smart RAM D ECC XCVR Application Processors/ USB ASICS/DSPs Integrated 1.1/2.0 Full- and High-Speed Engine XCVR Up to 96 MBytes/sec 4 KB 8/16 Burst Rate FIFO Enhanced USB Core Soft Configuration FIFO and Endpoint Memory Simplifies 8051 Code Easy Firmware Changes (Master or Slave Operation) Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 001-06120 Rev *M Revised April 28, 2017 Address (16) / Data Bus (8)CY7C68053 More Information Cypress provides a wealth of data at www.cypress.com to help you to select the right device for your design, and to help you to quickly and effectively integrate the device into your design. For a comprehensive list of resources, see the knowledge base article AN65209 - Getting Started with FX2LP. Overview: USB Portfolio, USB Roadmap Code Examples: USB Hi-Speed USB 3.0 Product Selectors: FX2LP, AT2LP, NX2LP-Flex, SX2 Application notes: Cypress offers a large number of USB Technical Reference Manual (TRM): application notes covering a broad range of topics, from basic MoBL-USB FX2LP18 Technical Reference Manual to advanced level. Recommended application notes for getting Reference Designs: started with FX3 are: CY4661 - External USB Hard Disk Drives (HDD) with Finger- AN65209 - Getting Started with FX2LP print Authentication Security AN15652 - Interfacing a Cypress MoBL-USB FX2LP18 FX2LP DMB-T/H TV Dongle Reference Design with an Intel PXA27x Processor AN6076 - Differences between EZ-USB FX2LP and Models: IBIS MoBL-USB FX2LP18 For complete list of Application notes, click here MoBL-USB FX2LP18 Development Kit The CY3687 MoBL-USB FX2LP18 Development Kit is a complete development resource for FX2LP18. It provides a platform to develop and test custom projects using FX2LP18. The development kit contains collateral materials for the firmware, hardware, and software aspects of a design using FX2LP18. GPIF II Designer FX2LP General Programmable Interface (GPIF) provides an independent hardware unit, which creates the data and control signals required by an external interface. FX2LP GPIF Designer allows users to create and modify GPIF waveform descriptors for EZ-USB FX2/ FX2LP family of chips using a graphical user interface. Extensive discussion of general GPIF discussion and programming using GPIF Designer is included in FX2LP18 Technical Reference Manual and GPIF Designer User Guide, distributed with GPIF Designer. AN66806 - Getting Started with EZ-USB FX2LP GPIF can be a good starting point. Document Number: 001-06120 Rev *M Page 2 of 45