CY7C69356 TrueTouch Multi-Touch Gesture Full Speed USB Controller TrueTouch Multi-Touch Gesture Full Speed USB Controller Full speed emulation Features Complex breakpoint structure Powerful Harvard-architecture processor 128-K trace memory M8C processor speeds running up to 24 MHz Precision, programmable clocking Low power at high processing speeds Internal 5.0 percent 6, 12, or 24 MHz main oscillator Interrupt controller Internal low-speed oscillator at 32 kHz for Watchdog and 1.71 V to 5.5 V operating voltage without USB Sleep Commercial temperature range: 0 C to +70 C Optional external 32-kHz crystal TrueTouch capacitive touchscreen controller 0.25 percent accuracy for USB with no external components Supports single-touch and multi-touch applications Programmable pin configurations Supports up to 33 X/Y sensor inputs 25 mA sink current on all GPIO Supports screen sizes 5.6 inch and below (typical) Pull up, High Z, open drain CMOS drive modes on all GPIO Fast scan rates: Typical 400 s per sensor CMOS drive mode on ports 0 and 1 Includes gesture detection library Up to 36 analog inputs on GPIO Configurable inputs on all GPIO Allows development of customized gestures Selectable, regulated digital I/O on port 1 Low-power TrueTouch block Configurable input threshold for port 1 2.5 mA average supply current at 8-ms report rate 3.0 V, 20 mA total port 1 source current 1.25 mA average supply current at 16-ms report rate 5 mA source current mode on ports 0 and 1 Flexible on-chip memory Hot-swap capable on all Port1GPIO Program and data storage options: Versatile analog mux 32-KB flash Common internal analog bus 50,000 erase and write cycles Simultaneous connection of I/O combinations 2048 bytes SRAM data storage High PSRR comparator Partial flash updates Low dropout voltage regulator for the analog array Flexible protection modes Additional system resources In-system serial programming (ISSP) 2 I C slave Full-speed USB (12 Mbps) Selectable to 50 kHz, 100 kHz, or 400 kHz Eight uni-directional endpoints Implementation requires no clock stretching One bi-directional control endpoint Implementation during sleep modes with less than 100 A USB 2.0 compliant Hardware address detection Dedicated 512 byte buffer SPI master and SPI slave Internal 3.3-V output regulator Configurable between 46.9 kHz and 12 MHz Available on 48-pin QFN packages only Three 16-bit timers Operating voltage with USB enabled: Watchdog and sleep timers 3.15 V to 3.45 V when supply voltage is around 3.3 V Internal voltage reference 4.35 V to 5.25 V when supply voltage is around 5.0 V Integrated supervisory circuit Complete development tools 8- to 10-bit Incremental analog-to-digital converter (ADC) Free development tool (PSoC Designer) Package options Full-featured, in-circuit emulator, and programmer 48-pin 7 7 1.0 mm QFN CONFIDENTIAL - RELEASED ONLY UNDER NONDISCLOSURE AGREEMENT (NDA) Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 001-86334 Rev. *B Revised April 15, 2016 CY7C69356 Logic Block Diagram 1.8/2.5/3V PWRSYS Port 4 Port 3 Port 2 Port 1 Port 0 LDO (Regulator) PSoC CORE SYSTEM BUS Global Analog Interconnect 32K Flash 2K SRAM Supervisory ROM (SROM) Nonvolatile Memory Interrupt Sleep and Controller CPU Core (M8C) Watchdog 6/12/24 MHz Internal Main Oscillator Internal Low Speed Oscillator (ILO) (IMO) Multiple Clock Sources TrueTouch Analog Reference SYSTEM TrueTouch Module Two Analog Comparators Mux SYSTEM BUS Internal POR SPI Three 16-Bit I2C System Digital USB Voltage and Master/ Programmable Slave Resets Clocks References LVD Slave Timers SYSTEM RESOURCES CONFIDENTIAL - RELEASED ONLY UNDER NONDISCLOSURE AGREEMENT (NDA) Document Number: 001-86334 Rev. *B Page 2 of 31