CY8CLED16 EZ-Color HB LED Controller Features HB LED Controller Advanced Peripherals (PSoC Blocks) Configurable Dimmers Support up to 16 16 Digital PSoC Blocks Provide: Independent LED Channels 8 to 32-Bit Timers, Counters, and PWMs 8-32 Bits of Resolution per Channel Up to 2 Full-Duplex UART Dynamic Reconfiguration Enables LED Multiple SPI Masters or Slaves Controller plus other Features Battery Connectable to all GPIO Pins Charging, Motor Control 12 Rail-to-Rail Analog PSoC Blocks Provide: Visual Embedded Design, PSoC Express Up to 14-Bit ADCs LED Based Express Drivers Up to 9-Bit DACs Binning Compensation Programmable Gain Amplifiers Temperature Feedback Programmable Filters and Comparators DMX512 Complex Peripherals by Combining Blocks PrISM Modulation Technology Flexible On-Chip Memory Reduces Radiated EMI 32K Flash Program Storage 50,000 Erase/Write Cycles Reduces Low Frequency Blinking 2K SRAM Data Storage Powerful Harvard Architecture Processor In-System Serial Programming (ISSP) M8C Processor Speeds to 24 MHz Partial Flash Updates 3.0 to 5.25V Operating Voltage Flexible Protection Modes Operating Voltages down to 1.0V using EEPROM Emulation in Flash On-Chip Switch Mode Pump (SMP) Complete Development Tools Industrial Temperature Range: -40C to +85C Free Development Software Programmable Pin Configurations PSoC Designer 25 mA Sink on all GPIO PSoC Express Pull up, Pull down, High Z, Strong, or Open Drain Drive Full-Featured, In-Circuit Emulator and Modes on all GPIO Programmer Up to eight Analog Inputs on GPIO Full Speed Emulation Configurable Interrupt on all GPIO Complex Breakpoint Structure 128 KBytes Trace Memory EZ-Color HB LED Controller Preliminary Data Sheet Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 001-13105 Rev. ** Revised June 12, 2007 CY8CLED16 Overview Block Diagram Analog Port 7 Port 6 Port 5 Port 4 Port 3 Port 2 Port 1 Port 0 Drivers SYSTEM BUS Global Digital Interconnect Global Analog Interconnect SRAM SROM Flash 32K PSoC CORE 2K CPU Core (M8C) Sleep and Interrupt Watchdog Controller Multiple Clock Sources (Includes IMO, ILO, PLL, and ECO) DIGITAL SYSTEM ANALOG SYSTEM Analog Ref. Digital Analog Block Block Array Array Analog Input Muxing Two POR and LVD Internal Switch Digital Multiply Decimator I2 C Voltage Mode Clocks Accums. System Resets Ref. Pump SYSTEM RESOURCES Document Number: 001-13105 Rev. ** Page 2 of 39