CY8CLED16 EZ-Color HB LED Controller Features HB LED Controller Advanced peripherals (PSoC Blocks) Configurable dimmers support up to 16 16 Digital PSoC Blocks Provide: Independent LED channels 8-to 32-bit timers, counters, and PWMs 8-to 32-bits of resolution per channel Up to 4 Full-Duplex UARTs Dynamic reconfiguration Enables LED controller Plus Other Multiple SPI masters or slaves Features: CapSense , battery charging, and motor control Connectable to all GPIO Pins Visual embedded design 12 Rail-to-Rail Analog PSoC Blocks Provide: LED-based drivers Up to 14-Bit ADCs Binning compensation Up to 9-Bit DACs Temperature feedback Programmable gain amplifiers Optical feedback Programmable filters and comparators DMX512 Complex peripherals by combining blocks PrISM modulation technology Flexible on-chip memory Reduces radiated EMI 32K flash program storage 50,000 Erase/Write Cycles Reduces low frequency blinking 2K SRAM Data Storage In-system serial programming (ISSP) Powerful Harvard-architecture Processor Partial flash updates M8C processor speeds to 24 MHz Flexible Protection Modes 3.0 to 5.25 V operating voltage electrically erasable programmable read-only memory Operating voltages down to 1.0 V using (EEPROM) emulation in flash On-Chip switch mode pump (SMP) Industrial temperature range: 40 C to +85 C Complete development tools Free development software Programmable pin configurations PSoC Designer 25 mA sink, 10 mA source on all GPIO Full-featured, In-circuit emulator and programmer Pull-up, Pull-down, High Z, Strong, or Open Drain Drive Modes on all GPIO Full speed emulation Up to eight analog Inputs on GPIO Complex breakpoint structure Configurable interrupt on all GPIO 128 KB trace memory EZ-Color HB LED Controller Preliminary Data Sheet Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 001-13105 Rev. *I Revised October 12, 2011CY8CLED16 Logic Block Diagram Analog Port 7 Port 6 Port 5 Port 4 Port 3 Port 2 Port 1 Port 0 Drivers SYSTEM BUS Global Digital Interconnect Global Analog Interconnect SRAM SROM Flash 32K PSoC CORE 2K Sleep and CPU Core (M8C) Interrupt Watchdog Controller Multiple Clock Sources (Includes IMO, ILO, PLL, and ECO) DIGITAL SYSTEM ANALOG SYSTEM Analog Ref. Digital Analog Block Block Array Array Analog Input Muxing Two POR and LVD Internal Switch Digital 2 Multiply Decimator Voltage Mode I C Clocks Accums. System Resets Ref. Pump SYSTEM RESOURCES Document Number: 001-13105 Rev. *I Page 2 of 52