CYUSB330x/CYUSB331x CYUSB332x/CYUSB230x HX3 USB 3.0 Hub HX3 USB 3.0 Hub General Description HX3 is a family of USB 3.0 hub controllers compliant with the USB 3.0 specification revision 1.0. HX3 supports SuperSpeed (SS), Hi-Speed (HS), Full-Speed (FS), and Low-Speed (LS) on all the ports. It has integrated termination, pull-up, and pull-down resistors, and supports configuration options through pin-straps to reduce the overall BOM of the system. HX3 includes the following Cypress-proprietary features: Shared Link: Enables extra downstream (DS) ports for on-board connections in embedded applications Ghost Charge: Enables charging of devices connected to the DS ports when no host is connected on the upstream (US) port HX3 USB 3.0 Hub 2 Vendor-Command Support to Implement a USB-to-I C Bridge Features Firmware upgrade of an external ASSP connected to HX3 USB-IF Certified Hub, TID 330000060, 30000074 through USB In-System Programming (ISP) of the EEPROM connected to Supports up to Four USB 3.0-Compliant DS ports HX3 through USB All ports support SS (5 Gbps), and are backward-compatible Extensive Configuration Support with HS (480 Mbps), FS (12 Mbps), and LS (1.5 Mbps) Pin-strap configuration for the following functions: SS and USB 2.0 Link Power Management (LPM) Vendor ID (VID) Dedicated Hi-Speed Transaction Translators (Multi-TT) LED status indicators suspend, SS, and USB 2.0 operation Charging support for each DS port Number of active ports Shared Link for Embedded Applications Number of non-removable devices Each DS port can simultaneously connect to an embedded SS device and a removable USB 2.0 device Ganged or individual power switch enables for DS ports Enables up to eight device connections Power switch polarity selection 2 Custom configuration modes supported with eFuse, I C Enhanced Battery Charging 2 EEPROM, or I C slave Each DS port complies with the USB Battery Charging v1.2 SS and USB 2.0 PHY parameters (BC v1.2) specification Product ID (PID)/VID, manufacturer, and product string Ghost Charge: Each DS port can emulate a Dedicated descriptors Charging Port (DCP) when the host is not connected to the US port Swap DP/DM signals for flexible PCB routing Accessory Charger Adapter Dock (ACA-Dock): Enables Software Features charging and simultaneous data transfer for a smart phone or a tablet acting as a host compliant to BC v1.2 Microsoft WHQL-certified for Windows XP/Vista/7/8/8.1 Apple charging supported on all DS ports Compatible with Mac OS 10.9 and Linux kernel version 3.11 Customize configuration parameters with the easy-to-use Integrated ARM Cortex-M0 CPU Cypresss Blaster Plus software tool 16 KB RAM, 32 KB ROM Flexible Packaging Options Configure GPIOs for overcurrent protection, power enable, and LEDs 68-pin QFN (8 8 1.0 mm) 2 Upgrade firmware using (a) I C EEPROM or (b) an external 88-pin QFN (10 10 1.0 mm) 2 I C master 100-ball BGA (6 6 1.0 mm) Industrial temperature range (40 C to +85 C) Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 +1-408-943-2600 Document Number: 001-73643 Rev. *R Revised January 25, 2018CYUSB330x/CYUSB331x CYUSB332x/CYUSB230x Block Diagram US Port USB 2.0 SS ARM USB2.0 SS VBUS Cortex-M0 PHY PHY Detect RAM ROM I2C DATA USB 2.0 Controller SS Controller I2C I2C CLK US Port Control Routing PHY Interface 3.3 V Hub Controller Hub Controller Four Transaction 1.2 V Translators Repeater US Buffers DS Buffers 26 MHz PLL Routing Logic Buffer and Routing Logic USB 2.0 SS Port USB 2.0 SS Port USB 2.0 SS Port USB 2.0 SS Port PHY PHY Control PHY PHY Control PHY PHY Control PHY PHY Control DS Port 1 DS Port 2 DS Port 3 DS Port 4 Document Number: 001-73643 Rev. *R Page 2 of 43 DP DM SSRxP/M SSTxP/M PWR OVR LED DP DM SSRxP/M SSTxP/M DP DM PWR OVR LED SSRxP/M SSTxP/M DP DM VBUS SSRxP/M SSTxP/M PWR OVR LED DP DM SSRxP/M SSTxP/M PWR OVR LED