S34ML01G1 S34ML02G1, S34ML04G1 1 Gb, 2 Gb, 4 Gb, 3 V SLC NAND Flash For Embedded Distinctive Characteristics Density NAND flash interface 1 Gb/ 2 Gb / 4 Gb Open NAND Flash Interface (ONFI) 1.0 compliant Address, Data and Commands multiplexed Architecture Supply voltage Input / Output Bus Width: 8-bits / 16-bits Page size: 3.3-V device: Vcc = 2.7 V ~ 3.6 V x8 = 2112 (2048 + 64) bytes 64 bytes is spare area Security x16 = 1056 (1024 + 32) words 32 words is spare area One Time Programmable (OTP) area Block size: 64 Pages Hardware program/erase disabled during power transition x8 = 128 KB + 4 KB Additional features x16 = 64k + 2k words 2 Gb and 4 Gb parts support Multiplane Program and Erase Plane size: commands 1 Gb / 2 Gb: 1024 Blocks per Plane Supports Copy Back Program x8 = 128 MB + 4 MB 2 Gb and 4 Gb parts support Multiplane Copy Back Program x16 = 64M + 2M words Supports Read Cache 4 Gb: 2048 Blocks per Plane Electronic signature x8 = 256 MB+ 8 MB x16 = 128M + 4M words Manufacturer ID: 01h Device size: Operating temperature 1 Gb: 1 Plane per Device or 128 MB Industrial: -40 C to 85 C 2 Gb: 2 Planes per Device or 256 MB Automotive: -40 C to 105 C 4 Gb: 2 Planes per Device or 512 MB Performance Page Read / Program For one plane structure (1-Gb density) Block zero is valid and will be valid for at least 1,000 Random access: 25 s (Max) program-erase cycles with ECC Sequential access: 25 ns (Min) For two plane structures (2-Gb and 4-Gb densities) Program time / Multiplane Program time: 200 s (Typ) Blocks zero and one are valid and will be valid for at least Block Erase (S34ML01G1) 1,000 program-erase cycles with ECC Block Erase time: 2.0 ms (Typ) Package options Block Erase / Multiplane Erase (S34ML02G1, S34ML04G1) Lead Free and Low Halogen Block Erase time: 3.5 ms (Typ) 48-Pin TSOP 12 20 1.2 mm Reliability 63-Ball BGA 9 11 1 mm 100,000 Program / Erase cycles (Typ) (with 1 bit ECC per 528 bytes (x8) or 264 words (x16)) 10 Year Data retention (Typ) Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 002-00676 Rev. *U Revised December 21, 2017S34ML01G1 S34ML02G1, S34ML04G1 Contents 1. General Description..................................................... 4 5.7 Pin Capacitance............................................................ 36 5.8 Thermal Resistance...................................................... 37 1.1 Logic Diagram................................................................ 5 5.9 Program / Erase Characteristics................................... 37 1.2 Connection Diagram ...................................................... 6 1.3 Pin Description............................................................... 7 6. Timing Diagrams......................................................... 38 1.4 Block Diagram................................................................ 8 6.1 Command Latch Cycle.................................................. 38 1.5 Array Organization......................................................... 9 6.2 Address Latch Cycle..................................................... 38 1.6 Addressing................................................................... 10 6.3 Data Input Cycle Timing................................................ 39 1.7 Mode Selection ............................................................ 12 6.4 Data Output Cycle Timing 2. Bus Operation ............................................................ 13 (CLE=L, WE =H, ALE=L, WP =H)............................... 39 6.5 Data Output Cycle Timing 2.1 Command Input ........................................................... 13 (EDO Type, CLE=L, WE =H, ALE=L) .......................... 40 2.2 Address Input............................................................... 13 6.6 Page Read Operation ................................................... 40 2.3 Data Input .................................................................... 13 6.7 Page Read Operation 2.4 Data Output.................................................................. 13 (Interrupted by CE ) ..................................................... 41 2.5 Write Protect ................................................................ 13 6.8 Page Read Operation Timing 2.6 Standby........................................................................ 13 with CE Dont Care ..................................................... 41 3. Command Set............................................................. 14 6.9 Page Program Operation.............................................. 42 3.1 Page Read................................................................... 15 6.10 Page Program Operation Timing 3.2 Page Program.............................................................. 15 with CE Dont Care ..................................................... 42 3.3 Multiplane Program 6.11 Page Program Operation with Random Data Input ...... 43 S34ML02G1 and S34ML04G1..................................... 16 6.12 Random Data Output In a Page ................................... 43 3.4 Page Reprogram 6.13 Multiplane Page Program Operation S34ML02G1 and S34ML04G1..................................... 16 S34ML02G1 and S34ML04G1 ..................................... 44 3.5 Block Erase.................................................................. 18 6.14 Block Erase Operation.................................................. 45 3.6 Multiplane Block Erase 6.15 Multiplane Block Erase S34ML02G1 and S34ML04G1..................................... 18 S34ML02G1 and S34ML04G1 ..................................... 45 3.7 Copy Back Program..................................................... 18 6.16 Copy Back Read with Optional Data Readout.............. 46 3.8 EDC Operation 6.17 Copy Back Program Operation S34ML02G1 and S34ML04G1..................................... 19 With Random Data Input............................................... 46 3.9 Read Status Register................................................... 21 6.18 Multiplane Copy Back Program 3.10 Read Status Enhanced S34ML02G1 and S34ML04G1 ..................................... 47 S34ML02G1 and S34ML04G1..................................... 22 6.19 Read Status Register Timing........................................ 48 3.11 Read Status Register Field Definition.......................... 22 6.20 Read Status Enhanced Timing ..................................... 48 3.12 Reset............................................................................ 22 6.21 Reset Operation Timing................................................ 48 3.13 Read Cache................................................................. 23 6.22 Read Cache.................................................................. 49 3.14 Cache Program............................................................ 24 6.23 Cache Program............................................................. 50 3.15 Multiplane Cache Program 6.24 Multiplane Cache Program S34ML02G1 and S34ML04G1..................................... 25 S34ML02G1 and S34ML04G1 ..................................... 51 3.16 Read ID........................................................................ 26 6.25 Read ID Operation Timing ............................................ 53 3.17 Read ID2...................................................................... 29 6.26 Read ID2 Operation Timing .......................................... 53 3.18 Read ONFI Signature .................................................. 29 6.27 Read ONFI Signature Timing........................................ 54 3.19 Read Parameter Page ................................................. 29 6.28 Read Parameter Page Timing ...................................... 54 3.20 One-Time Programmable (OTP) Entry ........................ 31 6.29 OTP Entry Timing ......................................................... 54 6.30 Power On and Data Protection Timing ......................... 55 4. Signal Descriptions ................................................... 32 6.31 WP Handling............................................................... 55 4.1 Data Protection and Power On / Off Sequence ........... 32 4.2 Ready/Busy.................................................................. 32 7. Physical Interface ....................................................... 56 4.3 Write Protect Operation ............................................... 33 7.1 Physical Diagram.......................................................... 56 5. Electrical Characteristics.......................................... 34 8. System Interface ......................................................... 58 5.1 Valid Blocks ................................................................. 34 9. Error Management ...................................................... 59 5.2 Absolute Maximum Ratings ......................................... 34 9.1 System Bad Block Replacement................................... 59 5.3 Recommended Operating Conditions.......................... 34 9.2 Bad Block Management................................................ 60 5.4 AC Test Conditions...................................................... 34 5.5 AC Characteristics ....................................................... 35 10. Ordering Information.................................................. 61 5.6 DC Characteristics....................................................... 36 Document Number: 002-00676 Rev. *U Page 2 of 66