KSZ8993ML Microchip

KSZ8993M Integrated 3-Port 10/100 Managed Switch with PHYs - IGMP V1/V2 Snooping Support for Multicast Features Packet Filtering Integrated 3-Port 10/100 Ethernet Switch - Double-Tagging Support - 2nd Generation Switch with Three MACs and Switch Management Features Two PHYs Fully Compliant to IEEE 802.3u - Port Mirroring/Monitoring/Sniffing: Ingress and/ Standard or Egress Traffic to Any Port or MII - Non-Blocking Switch Fabric Ensures Fast - Management Information Base Counters for Packet Delivery by Utilizing a 1K MAC Address Fully Compliant Statistics Gathering, 34 MIB Lookup Table and a Store-and-Forward Archi- Counters Per Port tecture - Loopback Modes for Remote Diagnostic of Fail- - Full-Duplex IEEE 802.3x Flow Control (PAUSE) ure with Force Mode Option Low Power Dissipation - Half-Duplex Back Pressure Flow Control - <0.8 Watts (includes PHY transmit drivers) - Automatic MDI/MDI-X Crossover with Disable - Full-Chip Hardware Power-Down (Register and Enable Option Configuration Not Saved) - 100BASE-FX Support on Port 1 - Per Port Based Software Power-Save on PHY - MII Interface Supports Both MAC Mode and (Idle Link Detection, Register Configuration Pre- PHY Mode served) - 7-Wire Serial Network Interface (SNI) Support - Voltages: Core 1.8V, I/O and Transceiver 3.3V for Legacy MAC (Use KSZ8993ML for 3.3V-Only Operation) - Comprehensive LED Indicator Support for Link, Available in a 128-Pin PQFP Package Activity, Full-/Half-Duplex and 10/100 Speed Comprehensive Configuration Register Access Applications - Serial Management Interface (SMI) to All Inter- Universal Solutions nal Registers - Broadband Gateway/Firewall/VPN - MII Management (MIIM) Interface to PHY Reg- - Integrated DSL or Cable Modem Multi-Port isters 2 Router - SPI and I C Interface to all internal registers - Wireless LAN Access Point + Gateway - I/O Pins Strapping and EEPROM to Program - Residential and Enterprise VoIP Gateway/ Selective Registers in Unmanaged Switch Phone Mode - Set-Top/Game Box - Control Registers Configurable on the Fly (Port- - Home Networking Expansion Priority, 802.1p/d/q, AN, etc.) QoS/CoS Packet Prioritization Support - Standalone 10/100 Switch - FTTx Customer Premises Equipment - Per Port, 802.1p, and DiffServ-Based - Re-Mapping of 802.1p Priority Field Per Port - Fiber Broadband Gateway Basis Upgradeable Solutions (Note 1) - Four Priority Levels - Unmanaged Switch with Future Option to Migrate to a Managed Solution Advanced Switch Features - IEEE 802.1q VLAN Support for Up to 16 Groups - Single PHY Alternative with Future Expansion Option for Two Ports (Full Range of VLAN IDs) - VLAN ID Tag/Untag Options, Per Port Basis Industrial Solutions - Applications that Require Port Redundancy and - IEEE 802.1p/q Tag Insertion or Removal on a Per Port Basis (Egress) Port Monitoring - Sensor Devices in Redundant Ring Topology - Programmable Rate Limiting from 0 Mbps to 100 Mbps at the Ingress and Egress Port, Rate Note 1: The cost and time of PCB re-spin. Options for High and Low Priority Per Port Basis - Broadcast Storm Protection with Percent Con- trol (Global and Per Port Basis) - IEEE 802.1d Spanning Tree Protocol Support - Upstream Special Tagging Mode to Inform the Processor which Ingress Port Receives the Packet 2019 Microchip Technology Inc. 1DS00003066A-page KSZ8993M TO OUR VALUED CUSTOMERS It is our intention to provide our valued customers with the best documentation possible to ensure successful use of your Microchip products. To this end, we will continue to improve our publications to better suit your needs. Our publications will be refined and enhanced as new volumes and updates are introduced. If you have any questions or comments regarding this publication, please contact the Marketing Communications Department via E-mail at docerrors microchip.com. We welcome your feedback. Most Current Data Sheet To obtain the most up-to-date version of this data sheet, please register at our Worldwide Web site at: